Richard Osborne 62b8786d12 Add instruction encodings / disassembly support 3r instructions. ... It is not possible to distinguish 3r instructions from 2r / rus instructions using only the fixed bits. Therefore if an instruction doesn't match the 2r / rus format try to decode it as a 3r instruction before returning Fail. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172984 91177308-0d34-0410-b5e6-96231b3b80d8		2013-01-20 17:18:47 +00:00
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ARM	Add some additional tests for the .bundle_lock align_to_end feature that didn't	2013-01-07 23:12:59 +00:00
AsmParser	Add support for macro parameters/arguments delimited by spaces,	2012-09-19 20:36:12 +00:00
COFF	[MC][COFF] Emit weak symbols to the correct section. Patch by Dmitry Puzirev!	2012-11-13 22:04:09 +00:00
Disassembler	Add instruction encodings / disassembly support 3r instructions.	2013-01-20 17:18:47 +00:00
ELF	llvm/test/MC/ELF/comp-dir.s: Appease MSYS Bash.	2012-12-18 05:08:12 +00:00
MachO	[MC/Mach-O] Implement integrated assembler support for linker options.	2013-01-18 19:37:00 +00:00
Markup	MC: Simple example parser for MC assembly markup.	2012-10-31 23:24:13 +00:00
MBlaze	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
Mips	This is a resubmittal. For some reason it broke the bots yesterday	2013-01-18 21:20:38 +00:00
PowerPC	PowerPC: EH adjustments	2013-01-09 17:08:15 +00:00
X86	[ms-inline asm] Extend support for parsing Intel bracketed memory operands that	2013-01-14 22:31:35 +00:00