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	- Incorporate Tilmann Scheller's ISD::TRUNCATE custom lowering patch - Update SPU calling convention info, even if it's not used yet (but can be at some point or another) - Ensure that any-extended f32 loads are custom lowered, especially when they're promoted for use in printf. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60438 91177308-0d34-0410-b5e6-96231b3b80d8
		
			
				
	
	
		
			82 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
			
		
		
	
	
			82 lines
		
	
	
		
			2.0 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
| ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
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| ; RUN: grep shufb   %t1.s | count 9
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| ; RUN: grep {ilhu.*1799}  %t1.s | count 1
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| ; RUN: grep {ilhu.*771}  %t1.s | count 3
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| ; RUN: grep {ilhu.*1543}  %t1.s | count 1
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| ; RUN: grep {ilhu.*1029}  %t1.s | count 1
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| ; RUN: grep {ilhu.*515}  %t1.s | count 1
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| ; RUN: grep {iohl.*1799}  %t1.s | count 1
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| ; RUN: grep {iohl.*771}  %t1.s | count 3
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| ; RUN: grep {iohl.*1543}  %t1.s | count 2
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| ; RUN: grep {iohl.*515}  %t1.s | count 1
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| ; RUN: grep xsbh  %t1.s | count 6
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| ; RUN: grep sfh  %t1.s | count 5
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| 
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| ; ModuleID = 'trunc.bc'
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| target datalayout = "E-p:32:32:128-i1:8:128-i8:8:128-i16:16:128-i32:32:128-i64:32:128-f32:32:128-f64:64:128-v64:64:64-v128:128:128-a0:0:128-s0:128:128"
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| target triple = "spu"
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| 
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| ; codegen for i128 arguments is not implemented yet on CellSPU
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| ; once this changes uncomment the functions below
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| ; and update the expected results accordingly
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| 
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| ;define i8 @trunc_i128_i8(i128 %u) nounwind readnone {
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| ;entry:
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| ;	%0 = trunc i128 %u to i8
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| ;	ret i8 %0
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| ;}
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| ;define i16 @trunc_i128_i16(i128 %u) nounwind readnone {
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| ;entry:
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| ;	%0 = trunc i128 %u to i16
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| ;	ret i16 %0
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| ;}
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| ;define i32 @trunc_i128_i32(i128 %u) nounwind readnone {
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| ;entry:
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| ;	%0 = trunc i128 %u to i32
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| ;	ret i32 %0
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| ;}
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| ;define i64 @trunc_i128_i64(i128 %u) nounwind readnone {
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| ;entry:
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| ;	%0 = trunc i128 %u to i64
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| ;	ret i64 %0
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| ;}
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| 
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| define i8 @trunc_i64_i8(i64 %u, i8 %v) nounwind readnone {
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| entry:
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| 	%0 = trunc i64 %u to i8
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| 	%1 = sub i8 %0, %v
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| 	ret i8 %1
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| }
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| define i16 @trunc_i64_i16(i64 %u, i16 %v) nounwind readnone {
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| entry:
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| 	%0 = trunc i64 %u to i16
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|         %1 = sub i16 %0, %v
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| 	ret i16 %1
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| }
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| define i32 @trunc_i64_i32(i64 %u, i32 %v) nounwind readnone {
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| entry:
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| 	%0 = trunc i64 %u to i32
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| 	%1 = sub i32 %0, %v
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| 	ret i32 %1
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| }
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| 
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| define i8 @trunc_i32_i8(i32 %u, i8 %v) nounwind readnone {
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| entry:
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| 	%0 = trunc i32 %u to i8
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| 	%1 = sub i8 %0, %v
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| 	ret i8 %1
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| }
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| define i16 @trunc_i32_i16(i32 %u, i16 %v) nounwind readnone {
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| entry:
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| 	%0 = trunc i32 %u to i16
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| 	%1 = sub i16 %0, %v
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| 	ret i16 %1
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| }
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| 
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| define i8 @trunc_i16_i8(i16 %u, i8 %v) nounwind readnone {
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| entry:
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| 	%0 = trunc i16 %u to i8
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| 	%1 = sub i8 %0, %v
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| 	ret i8 %1
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| }
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