llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-21 03:32:21 +00:00

History

Jim Grosbach 63b46faeb8 Thumb1 register to register MOV instruction is predicable.

Fix a FIXME and allow predication (in Thumb2) for the T1 register to
register MOV instructions. This allows some better codegen with
if-conversion (as seen in the test updates), plus it lays the groundwork
for pseudo-izing the tMOVCC instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134197 91177308-0d34-0410-b5e6-96231b3b80d8

2011-06-30 22:10:46 +00:00

Alpha

make the asmparser reject function and type redefinitions. 'Merging' hasn't been

2011-06-17 07:06:44 +00:00

ARM

In the ARM global merging pass, allow extraneous alignment specifiers. This pass

2011-06-29 22:24:25 +00:00

Blackfin

Remove support for parsing the "type i32" syntax for defining a numbered

2011-06-19 00:03:46 +00:00

CBackend

Add support for sadd.with.overflow and uadd.with.overflow intrinsics to the CBackend by emitting definitions for each intrinsic that occurs in the module.