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65bae699c4ae6fcd2c56a84a68ab9651ab1d18d1
llvm-6502/lib/Target/R600
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Tom Stellard 65bae699c4 R600/SI: Add some missing overrides 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234384 91177308-0d34-0410-b5e6-96231b3b80d8
2015-04-08 02:07:05 +00:00
..
AsmParser
R600/SI: Initial support for assembler and inline assembly
2015-04-08 01:09:26 +00:00
InstPrinter
R600/SI: Initial support for assembler and inline assembly
2015-04-08 01:09:26 +00:00
MCTargetDesc
Replace the MCSubtargetInfo parameter with a Triple when creating
2015-03-31 00:10:04 +00:00
TargetInfo
R600/SI: Add a stub GCNTargetMachine
2015-01-06 18:00:21 +00:00
AMDGPU.h
[PM] Remove a bunch of stale TTI creation method declarations. I nuked
2015-02-01 00:22:15 +00:00
AMDGPU.td
R600/SI: Initial support for assembler and inline assembly
2015-04-08 01:09:26 +00:00
AMDGPUAlwaysInlinePass.cpp
Reapply: R600: Make sure to inline all internal functions
2014-11-03 19:49:05 +00:00
AMDGPUAsmPrinter.cpp
R600/SI: Initial support for assembler and inline assembly
2015-04-08 01:09:26 +00:00
AMDGPUAsmPrinter.h
R600/SI: Add some missing overrides
2015-04-08 02:07:05 +00:00
AMDGPUCallingConv.td
…
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUInstrInfo.cpp
Remove the need to cache the subtarget in the R600 TargetRegisterInfo
2015-03-11 18:43:21 +00:00
AMDGPUInstrInfo.h
ArrayRefize memory operand folding. NFC.
2015-02-28 12:04:00 +00:00
AMDGPUInstrInfo.td
R600: Use new fmad node.
2015-02-20 22:10:41 +00:00
AMDGPUInstructions.td
R600/SI: Select V_BFE_U32 for and+shift with a non-literal offset
2015-03-24 13:40:34 +00:00
AMDGPUIntrinsicInfo.cpp
…
AMDGPUIntrinsicInfo.h
…
AMDGPUIntrinsics.td
R600/SI: Add an intrinsic for S_FLBIT_I32 / V_FFBH_I32
2015-03-04 17:33:45 +00:00
AMDGPUISelDAGToDAG.cpp
R600/SI: Custom-select 32-bit S_BFE from bitwise opcodes
2015-03-24 13:40:27 +00:00
AMDGPUISelLowering.cpp
R600/SI: Expand fract to floor, then only select V_FRACT on CI
2015-03-24 13:40:08 +00:00
AMDGPUISelLowering.h
R600: Use new fmad node.
2015-02-20 22:10:41 +00:00
AMDGPUMachineFunction.cpp
R600: Canonicalize access to function attributes, NFC
2015-02-14 02:45:45 +00:00
AMDGPUMachineFunction.h
Reapply "R600: Add new intrinsic to read work dimensions"
2014-10-14 20:05:26 +00:00
AMDGPUMCInstLower.cpp
[MCInstPrinter] Enable MCInstPrinter to change its behavior based on the
2015-03-27 20:36:02 +00:00
AMDGPUMCInstLower.h
R600/SI: Don't shrink instructions whose e32 encoding doesn't exist
2015-01-15 18:42:51 +00:00
AMDGPUPromoteAlloca.cpp
Remove superfluous .str() and replace std::string concatenation with Twine.
2015-03-27 17:51:30 +00:00
AMDGPURegisterInfo.cpp
Remove the need to cache the subtarget in the R600 TargetRegisterInfo
2015-03-11 18:43:21 +00:00
AMDGPURegisterInfo.h
Remove the need to cache the subtarget in the R600 TargetRegisterInfo
2015-03-11 18:43:21 +00:00
AMDGPURegisterInfo.td
…
AMDGPUSubtarget.cpp
R600/SI: Initial support for assembler and inline assembly
2015-04-08 01:09:26 +00:00
AMDGPUSubtarget.h
R600/SI: Initial support for assembler and inline assembly
2015-04-08 01:09:26 +00:00
AMDGPUTargetMachine.cpp
Grab a subtarget off of an AMDGPUTargetMachine rather than a
2015-03-21 03:17:25 +00:00
AMDGPUTargetMachine.h
Remove the target independent TargetMachine::getSubtarget and
2015-03-21 04:22:23 +00:00
AMDGPUTargetTransformInfo.cpp
DataLayout is mandatory, update the API to reflect it with references.
2015-03-10 02:37:25 +00:00
AMDGPUTargetTransformInfo.h
[multiversion] Remove the function parameter from the unrolling
2015-02-01 14:31:23 +00:00
AMDILCFGStructurizer.cpp
CodeGen: Use the new DebugLoc API, NFC
2015-03-30 19:14:47 +00:00
AMDKernelCodeT.h
R600/SI: Emit amd_kernel_code_t header for AMDGPU environment
2014-12-02 22:00:07 +00:00
CaymanInstructions.td
R600/SI: Implement correct f64 fdiv
2015-02-14 04:30:08 +00:00
CIInstructions.td
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
CMakeLists.txt
R600/SI: Spill VGPRs to scratch space for compute shaders
2015-01-14 15:42:31 +00:00
EvergreenInstructions.td
R600/SI: Select V_BFE_U32 for and+shift with a non-literal offset
2015-03-24 13:40:34 +00:00
LLVMBuild.txt
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
Makefile
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
Processors.td
R600/SI: Limit SGPRs to 80 on Tonga and Iceland
2015-03-09 15:48:09 +00:00
R600ClauseMergePass.cpp
Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.
2015-03-23 19:32:43 +00:00
R600ControlFlowFinalizer.cpp
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
R600Defines.h
…
R600EmitClauseMarkers.cpp
…
R600ExpandSpecialInstrs.cpp
…
R600InstrFormats.td
R600/SI: Start implementing an assembler
2014-11-14 14:08:00 +00:00
R600InstrInfo.cpp
Remove the need to cache the subtarget in the R600 TargetRegisterInfo
2015-03-11 18:43:21 +00:00
R600InstrInfo.h
Remove unused argument to CreateTargetScheduleState and change
2014-10-09 01:59:35 +00:00
R600Instructions.td
R600: Use new fmad node.
2015-02-20 22:10:41 +00:00
R600Intrinsics.td
…
R600ISelLowering.cpp
Fix typo in comment.
2015-03-25 22:34:16 +00:00
R600ISelLowering.h
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
Remove a few more calls to TargetMachine::getSubtarget from the
2015-02-19 01:10:55 +00:00
R600MachineScheduler.h
…
R600OptimizeVectorRegisters.cpp
Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.
2015-03-23 19:32:43 +00:00
R600Packetizer.cpp
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
R600RegisterInfo.cpp
Remove the need to cache the subtarget in the R600 TargetRegisterInfo
2015-03-11 18:43:21 +00:00
R600RegisterInfo.h
Remove the need to cache the subtarget in the R600 TargetRegisterInfo
2015-03-11 18:43:21 +00:00
R600RegisterInfo.td
…
R600Schedule.td
…
R600TextureIntrinsicsReplacer.cpp
…
R700Instructions.td
Reuse a bunch of cached subtargets and remove getSubtarget calls
2015-01-30 23:24:40 +00:00
SIAnnotateControlFlow.cpp
R600/SI: Fix bug from insertion of llvm.SI.end.cf into loop headers
2015-02-05 15:32:15 +00:00
SIDefines.h
R600/SI: Also enable WQM for image opcodes which calculate LOD v3
2015-02-06 02:51:20 +00:00
SIFixSGPRCopies.cpp
R600/SI: Remove VReg_32 register class
2015-01-07 20:59:25 +00:00
SIFixSGPRLiveRanges.cpp
Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.
2015-03-23 19:32:43 +00:00
SIFoldOperands.cpp
Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.
2015-03-23 19:32:43 +00:00
SIInsertWaits.cpp
Remove the need to cache the subtarget in the R600 TargetRegisterInfo
2015-03-11 18:43:21 +00:00
SIInstrFormats.td
R600/SI: Initial support for assembler and inline assembly
2015-04-08 01:09:26 +00:00
SIInstrInfo.cpp
R600/SI: Improve BFM support
2015-03-24 13:40:21 +00:00
SIInstrInfo.h
R600/SI: Merge tables for commuting
2015-03-23 18:45:41 +00:00
SIInstrInfo.td
R600/SI: Initial support for assembler and inline assembly
2015-04-08 01:09:26 +00:00
SIInstructions.td
R600/SI: Initial support for assembler and inline assembly
2015-04-08 01:09:26 +00:00
SIIntrinsics.td
…
SIISelLowering.cpp
R600/SI: Initial support for assembler and inline assembly
2015-04-08 01:09:26 +00:00
SIISelLowering.h
R600/SI: Add some missing overrides
2015-04-08 02:07:05 +00:00
SILoadStoreOptimizer.cpp
Re-sort includes with sort-includes.py and insert raw_ostream.h where it's used.
2015-03-23 19:32:43 +00:00
SILowerControlFlow.cpp
R600/SI: Don't enable WQM for V_INTERP_* instructions v2
2015-02-06 02:51:25 +00:00
SILowerI1Copies.cpp
R600/SI: Remove VReg_32 register class
2015-01-07 20:59:25 +00:00
SIMachineFunctionInfo.cpp
Remove a few more calls to TargetMachine::getSubtarget from the
2015-02-19 01:10:55 +00:00
SIMachineFunctionInfo.h
R600/SI: Add subtarget feature to enable VGPR spilling for all shader types
2015-01-20 19:33:04 +00:00
SIPrepareScratchRegs.cpp
R600/SI: Fix simple-loop.ll test
2015-01-20 19:33:02 +00:00
SIRegisterInfo.cpp
R600/SI: Insert more NOPs after READLANE on VI, don't use NOPs on CI
2015-03-24 13:40:38 +00:00
SIRegisterInfo.h
Remove the need to cache the subtarget in the R600 TargetRegisterInfo
2015-03-11 18:43:21 +00:00
SIRegisterInfo.td
R600/SI: Initial support for assembler and inline assembly
2015-04-08 01:09:26 +00:00
SISchedule.td
R600/SI: Define a schedule model
2015-01-14 01:13:19 +00:00
SIShrinkInstructions.cpp
Purge unused includes throughout libSupport.
2015-03-23 18:07:13 +00:00
SITypeRewriter.cpp
Remove more superfluous .str() and replace std::string concatenation with Twine.
2015-03-30 15:42:36 +00:00
VIInstrFormats.td
R600/SI: Rename dst encoding field to be consistent with docs
2015-02-18 02:15:37 +00:00
VIInstructions.td
R600/SI: Add VI versions of MUBUF loads and stores
2015-01-27 17:24:58 +00:00