Files
llvm-6502/lib/CodeGen/SelectionDAG
Benjamin Kramer 66feb63c3c Legalizer: Use the scalar bit width when promoting bit counting instrs on
vectors.

e.g. when promoting ctlz from <2 x i32> to <2 x i64> we have to fixup
the result by 32 bits, not 64. PR20917.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217671 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-12 12:50:27 +00:00
..