llvm-6502/test/MC/Disassembler
2013-09-05 16:05:45 +00:00
..
AArch64 Inplement aarch64 neon instructions in AdvSIMD(shift). About 24 shift instructions: 2013-09-04 09:28:24 +00:00
ARM [ARMv8] Add some missing tests for DSB/DMB. 2013-09-05 16:05:45 +00:00
Mips
SystemZ [SystemZ] Add NC, OC and XC 2013-09-05 10:36:45 +00:00
X86 Fixed a bug where diassembling an instruction that had a prefix would cause LLVM to identify a 1-byte instruction, but then upon querying it for that 1-byte instruction would cause an undefined opcode. 2013-08-30 21:19:48 +00:00
XCore