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PBQP
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Analysis.h
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AsmPrinter.h
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Make AsmPrinter::emitImplicitDef a virtual method so targets can emit custom comments for implicit defs
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2013-10-11 12:39:36 +00:00 |
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CalcSpillWeights.h
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CallingConvLower.h
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CommandFlags.h
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DAGCombine.h
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DFAPacketizer.h
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EdgeBundles.h
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FastISel.h
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FunctionLoweringInfo.h
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GCMetadata.h
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GCMetadataPrinter.h
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GCs.h
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GCStrategy.h
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IntrinsicLowering.h
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ISDOpcodes.h
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[ARM] Use the load-acquire/store-release instructions optimally in AArch32.
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2013-09-26 12:22:36 +00:00 |
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JITCodeEmitter.h
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LatencyPriorityQueue.h
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LexicalScopes.h
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LinkAllAsmWriterComponents.h
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LinkAllCodegenComponents.h
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LiveInterval.h
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Print register in LiveInterval::print()
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2013-10-10 21:29:05 +00:00 |
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LiveIntervalAnalysis.h
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Represent RegUnit liveness with LiveRange instance
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2013-10-10 21:29:02 +00:00 |
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LiveIntervalUnion.h
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Rename LiveRange to LiveInterval::Segment
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2013-10-10 21:28:43 +00:00 |
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LiveRangeEdit.h
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LiveRegMatrix.h
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LiveRegUnits.h
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Introduce ad hoc liveness tracking utility: LiveRegUnits
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2013-10-11 19:04:35 +00:00 |
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LiveStackAnalysis.h
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LiveVariables.h
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MachineBasicBlock.h
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Even more spelling fixes for "instruction".
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2013-09-28 13:42:22 +00:00 |
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MachineBlockFrequencyInfo.h
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MachineBranchProbabilityInfo.h
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MachineCodeEmitter.h
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MachineCodeInfo.h
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MachineConstantPool.h
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MachineDominators.h
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MachineFrameInfo.h
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MachineFunction.h
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MachineFunctionAnalysis.h
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MachineFunctionPass.h
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MachineInstr.h
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Rename parameter: defined regs are not incoming.
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2013-10-10 21:28:38 +00:00 |
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MachineInstrBuilder.h
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MachineInstrBundle.h
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Add a getBundleEnd() function to go with the existing getBundleStart().
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2013-01-09 01:02:19 +00:00 |
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MachineJumpTableInfo.h
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MachineLoopInfo.h
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MachineMemOperand.h
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MachineModuleInfo.h
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MachineModuleInfoImpls.h
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MachineOperand.h
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MachinePassRegistry.h
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MachinePostDominators.h
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MachineRegisterInfo.h
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MachineRelocation.h
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MachineScheduler.h
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Allow subtarget selection of the default MachineScheduler and document the interface.
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2013-09-20 05:14:41 +00:00 |
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MachineSSAUpdater.h
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MachineTraceMetrics.h
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Add ArrayRef constructor from None, and do the cleanups that this constructor enables
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2013-05-05 00:40:33 +00:00 |
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MachORelocation.h
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Passes.h
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Remove the now unused strong phi elimination pass.
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2013-10-14 16:39:04 +00:00 |
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PseudoSourceValue.h
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RegAllocPBQP.h
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RegAllocRegistry.h
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RegisterClassInfo.h
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RegisterPressure.h
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Represent RegUnit liveness with LiveRange instance
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2013-10-10 21:29:02 +00:00 |
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RegisterScavenging.h
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ResourcePriorityQueue.h
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RuntimeLibcalls.h
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ScheduleDAG.h
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Explicitly request unsigned enum types when desired
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2013-10-08 20:15:11 +00:00 |
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ScheduleDAGInstrs.h
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Even more spelling fixes for "instruction".
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2013-09-28 13:42:22 +00:00 |
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ScheduleDFS.h
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ScheduleHazardRecognizer.h
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SchedulerRegistry.h
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ScoreboardHazardRecognizer.h
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SelectionDAG.h
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[ARM] Use the load-acquire/store-release instructions optimally in AArch32.
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2013-09-26 12:22:36 +00:00 |
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SelectionDAGISel.h
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Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon.
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2013-10-05 05:38:16 +00:00 |
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SelectionDAGNodes.h
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Remove an old workaround for a compiler that EOL'd years ago.
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2013-09-29 19:39:02 +00:00 |
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SlotIndexes.h
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StackProtector.h
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[stackprotector] Refactor the StackProtector pass from a single .cpp file into StackProtector.h and StackProtector.cpp.
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2013-09-27 21:58:43 +00:00 |
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TargetLoweringObjectFileImpl.h
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TargetSchedule.h
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IfConverter: Use TargetSchedule for instruction latencies
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2013-09-30 15:28:56 +00:00 |
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ValueTypes.h
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Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
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2013-10-10 17:00:52 +00:00 |
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ValueTypes.td
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Implement aarch64 neon instruction set AdvSIMD (Across).
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2013-10-05 08:22:10 +00:00 |
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VirtRegMap.h
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