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https://github.com/c64scene-ar/llvm-6502.git
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477fc628b3
Patch by Ana Pazos. 1.Added support for v1ix and v1fx types. 2.Added Scalar Pairwise Reduce instructions. 3.Added initial implementation of Scalar Arithmetic instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191263 91177308-0d34-0410-b5e6-96231b3b80d8
137 lines
5.1 KiB
TableGen
137 lines
5.1 KiB
TableGen
//===- IntrinsicsAArch64.td - Defines AArch64 intrinsics -----------*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines all of the AArch64-specific intrinsics.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Advanced SIMD (NEON)
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let TargetPrefix = "aarch64" in { // All intrinsics start with "llvm.aarch64.".
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// Vector Absolute Compare (Floating Point)
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def int_aarch64_neon_vacgeq :
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Intrinsic<[llvm_v2i64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem]>;
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def int_aarch64_neon_vacgtq :
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Intrinsic<[llvm_v2i64_ty], [llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem]>;
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// Vector maxNum (Floating Point)
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def int_aarch64_neon_vmaxnm : Neon_2Arg_Intrinsic;
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// Vector minNum (Floating Point)
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def int_aarch64_neon_vminnm : Neon_2Arg_Intrinsic;
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// Vector Pairwise maxNum (Floating Point)
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def int_aarch64_neon_vpmaxnm : Neon_2Arg_Intrinsic;
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// Vector Pairwise minNum (Floating Point)
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def int_aarch64_neon_vpminnm : Neon_2Arg_Intrinsic;
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// Vector Multiply Extended (Floating Point)
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def int_aarch64_neon_vmulx : Neon_2Arg_Intrinsic;
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class Neon_N2V_Intrinsic
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: Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, llvm_i32_ty],
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[IntrNoMem]>;
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class Neon_N3V_Intrinsic
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: Intrinsic<[llvm_anyvector_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>, llvm_i32_ty],
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[IntrNoMem]>;
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class Neon_N2V_Narrow_Intrinsic
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: Intrinsic<[llvm_anyvector_ty],
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[LLVMExtendedElementVectorType<0>, llvm_i32_ty],
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[IntrNoMem]>;
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// Vector rounding shift right by immediate (Signed)
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def int_aarch64_neon_vsrshr : Neon_N2V_Intrinsic;
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def int_aarch64_neon_vurshr : Neon_N2V_Intrinsic;
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def int_aarch64_neon_vsqshlu : Neon_N2V_Intrinsic;
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def int_aarch64_neon_vsri : Neon_N3V_Intrinsic;
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def int_aarch64_neon_vsli : Neon_N3V_Intrinsic;
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def int_aarch64_neon_vsqshrun : Neon_N2V_Narrow_Intrinsic;
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def int_aarch64_neon_vrshrn : Neon_N2V_Narrow_Intrinsic;
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def int_aarch64_neon_vsqrshrun : Neon_N2V_Narrow_Intrinsic;
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def int_aarch64_neon_vsqshrn : Neon_N2V_Narrow_Intrinsic;
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def int_aarch64_neon_vuqshrn : Neon_N2V_Narrow_Intrinsic;
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def int_aarch64_neon_vsqrshrn : Neon_N2V_Narrow_Intrinsic;
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def int_aarch64_neon_vuqrshrn : Neon_N2V_Narrow_Intrinsic;
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// Scalar Add
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def int_aarch64_neon_vaddds :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
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def int_aarch64_neon_vadddu :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
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// Scalar Saturating Add (Signed, Unsigned)
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def int_aarch64_neon_vqadds : Neon_2Arg_Intrinsic;
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def int_aarch64_neon_vqaddu : Neon_2Arg_Intrinsic;
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// Scalar Sub
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def int_aarch64_neon_vsubds :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
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def int_aarch64_neon_vsubdu :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
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// Scalar Saturating Sub (Signed, Unsigned)
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def int_aarch64_neon_vqsubs : Neon_2Arg_Intrinsic;
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def int_aarch64_neon_vqsubu : Neon_2Arg_Intrinsic;
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// Scalar Shift
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// Scalar Shift Left
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def int_aarch64_neon_vshlds :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
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def int_aarch64_neon_vshldu :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
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// Scalar Saturating Shift Left
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def int_aarch64_neon_vqshls : Neon_2Arg_Intrinsic;
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def int_aarch64_neon_vqshlu : Neon_2Arg_Intrinsic;
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// Scalar Shift Rouding Left
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def int_aarch64_neon_vrshlds :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
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def int_aarch64_neon_vrshldu :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty, llvm_v1i64_ty], [IntrNoMem]>;
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// Scalar Saturating Rounding Shift Left
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def int_aarch64_neon_vqrshls : Neon_2Arg_Intrinsic;
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def int_aarch64_neon_vqrshlu : Neon_2Arg_Intrinsic;
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// Scalar Reduce Pairwise Add.
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def int_aarch64_neon_vpadd :
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Intrinsic<[llvm_v1i64_ty], [llvm_v2i64_ty],[IntrNoMem]>;
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def int_aarch64_neon_vpfadd :
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Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
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def int_aarch64_neon_vpfaddq :
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Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
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// Scalar Reduce Pairwise Floating Point Max/Min.
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def int_aarch64_neon_vpmax :
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Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
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def int_aarch64_neon_vpmaxq :
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Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
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def int_aarch64_neon_vpmin :
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Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
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def int_aarch64_neon_vpminq :
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Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
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// Scalar Reduce Pairwise Floating Point Maxnm/Minnm.
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def int_aarch64_neon_vpfmaxnm :
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Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
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def int_aarch64_neon_vpfmaxnmq :
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Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
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def int_aarch64_neon_vpfminnm :
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Intrinsic<[llvm_v1f32_ty], [llvm_v2f32_ty], [IntrNoMem]>;
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def int_aarch64_neon_vpfminnmq :
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Intrinsic<[llvm_v1f64_ty], [llvm_v2f64_ty], [IntrNoMem]>;
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}
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