Evan Cheng c8578948c9 Remove -use-divmod-libcall. Let targets opt in when they are available. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129884 91177308-0d34-0410-b5e6-96231b3b80d8

2011-04-20 22:20:12 +00:00

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Alpha

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ARM

Remove -use-divmod-libcall. Let targets opt in when they are available.

2011-04-20 22:20:12 +00:00

Blackfin

Don't completely eliminate identity copies that also modify super register liveness.

2011-03-31 17:55:25 +00:00

CBackend

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CellSPU

don't test for codegen of 'store undef'

2011-04-09 02:31:26 +00:00

CPP

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Generic

Un-XFAIL this test for ARM. <rdar://problem/7662569>

2011-04-20 21:47:45 +00:00

MBlaze

Add scheduling information for the MBlaze backend.

2011-04-11 22:31:52 +00:00

Mips

Make tests register allocation independent again.

2011-04-19 00:14:43 +00:00

MSP430

Enhance ComputeMaskedBits to know that aligned frameindexes

2011-02-13 22:25:43 +00:00

PowerPC

These tests no longer require linear scan because reserved register coalescing is now universal.

2011-04-05 21:40:41 +00:00

PTX

PTX: Add intrinsics to list of built-in intrinsics, which allows them to be

2011-04-20 15:37:17 +00:00

SPARC

These tests no longer require linear scan because reserved register coalescing is now universal.

2011-04-05 21:40:41 +00:00

SystemZ

Fix SystemZ tests

2011-03-31 23:02:12 +00:00

Thumb

Make tests register allocation independent again.

2011-04-19 00:14:43 +00:00

Thumb2

Recommit r129383. PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency.

2011-04-13 00:38:32 +00:00

X86

llc: Eliminate a use of getDarwinMajorNumber().

2011-04-19 20:46:13 +00:00

XCore

Fix Mips, Sparc, and XCore tests that were dependent on register allocation.

2011-03-31 18:42:43 +00:00