Venkatraman Govindaraju 6a0fffd799 [Sparc] Add support for inline assembly constraints which specify registers by their aliases. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199786 91177308-0d34-0410-b5e6-96231b3b80d8		2014-01-22 03:18:42 +00:00
..
AArch64	[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT.	2014-01-21 01:48:52 +00:00
ARM	Remove the useless pseudo instructions VDUPfdf and VDUPfqf, replacing them with patterns to match VDUPLN.	2014-01-20 17:14:48 +00:00
CPP
Generic
Hexagon
Inputs
Mips	Fix PR18572 - llc crash during GenericScheduler::initPolicy().	2014-01-21 21:27:37 +00:00
MSP430
NVPTX	[NVPTX] Add missing patterns for div.approx with immediate denominator	2014-01-21 14:40:05 +00:00
PowerPC	Fix pointer info on PPC byval stores	2014-01-21 20:15:58 +00:00
R600	Fix broken CHECK lines.	2014-01-11 21:06:00 +00:00
SPARC	[Sparc] Add support for inline assembly constraints which specify registers by their aliases.	2014-01-22 03:18:42 +00:00
SystemZ	[SystemZ] Flesh out stackrestore test (frame-11.ll)	2014-01-13 15:44:44 +00:00
Thumb	CodeGen: Stop treating vectors as aggregates	2014-01-21 22:46:46 +00:00
Thumb2
X86	Tweak the spelling of the asserts requirement a bit more. This makes it	2014-01-21 22:39:19 +00:00
XCore	Fix broken CHECK lines.	2014-01-11 21:06:00 +00:00