llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-01-10 02:36:06 +00:00

History

Oliver Stannard 43c6b6be8f [Thumb] 32-bit encodings of 'cps' are not valid for v7M

v7M only allows the 16-bit encoding of the 'cps' (Change Processor
State) instruction, and does not have the 32-bit encoding which is
valid from v6T2 onwards.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218382 91177308-0d34-0410-b5e6-96231b3b80d8

2014-09-24 14:20:01 +00:00

AArch64

AArch64: allow constant expressions for shifted reg literals

2014-09-23 22:16:02 +00:00

ARM

[Thumb] 32-bit encodings of 'cps' are not valid for v7M

2014-09-24 14:20:01 +00:00

AsmParser

…

COFF

MC: ReadOnlyWithRel section kinds should map to rdata in COFF

2014-09-22 20:39:23 +00:00