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https://github.com/c64scene-ar/llvm-6502.git
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fa2ab3e4ab
so that the test will not fail when run on an Intel Atom processor, due to the Atom scheduler producing an instruction sequence that is different from that which is normally expected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151832 91177308-0d34-0410-b5e6-96231b3b80d8
32 lines
1008 B
LLVM
32 lines
1008 B
LLVM
; RUN: llc < %s -mcpu=generic -march=x86 | FileCheck %s
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; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
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; CHECK-NOT: lea
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@B = external global [1000 x float], align 32
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@A = external global [1000 x float], align 32
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@P = external global [1000 x i32], align 32
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define void @foo(i32 %m) nounwind {
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entry:
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%tmp1 = icmp sgt i32 %m, 0
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br i1 %tmp1, label %bb, label %return
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bb:
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%i.019.0 = phi i32 [ %indvar.next, %bb ], [ 0, %entry ]
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%tmp2 = getelementptr [1000 x float]* @B, i32 0, i32 %i.019.0
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%tmp3 = load float* %tmp2, align 4
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%tmp4 = fmul float %tmp3, 2.000000e+00
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%tmp5 = getelementptr [1000 x float]* @A, i32 0, i32 %i.019.0
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store float %tmp4, float* %tmp5, align 4
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%tmp8 = shl i32 %i.019.0, 1
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%tmp9 = add i32 %tmp8, 64
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%tmp10 = getelementptr [1000 x i32]* @P, i32 0, i32 %i.019.0
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store i32 %tmp9, i32* %tmp10, align 4
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%indvar.next = add i32 %i.019.0, 1
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%exitcond = icmp eq i32 %indvar.next, %m
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br i1 %exitcond, label %return, label %bb
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return:
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ret void
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}
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