Bill Wendling 52925b60f1 Some instructions end with an "ls" prefix, but it doesn't indicate that they are ...

conditional. Check for those instructions explicitly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117747 91177308-0d34-0410-b5e6-96231b3b80d8

2010-10-29 23:50:21 +00:00

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Analysis

Teach memdep to use pointsToConstantMemory to determine that loads

2010-10-29 01:14:04 +00:00

Archive

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Assembler

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Bindings/Ocaml

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Bitcode

Testcase for PR8494 (invalid bitcode crashing the bitcode reader).

2010-10-28 15:57:30 +00:00

BugPoint

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CodeGen

Teach machine cse to eliminate instructions with multiple physreg uses and defs. rdar://8610857.

2010-10-29 23:36:03 +00:00

DebugInfo

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ExecutionEngine

The ARM jit cannot handle these tests as of 2010-10-27.

2010-10-29 00:23:43 +00:00

Feature

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FrontendAda

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FrontendC

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FrontendC++

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FrontendFortran

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FrontendObjC

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FrontendObjC++

Temporarily revert r117079; it broke a tester. Radar 6635085.

2010-10-22 18:44:22 +00:00

Integer

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lib

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Linker

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LLVMC

Remove -llvmc-temp-hack from tblgen.

2010-10-23 07:32:53 +00:00

MC

Some instructions end with an "ls" prefix, but it doesn't indicate that they are

2010-10-29 23:50:21 +00:00

Other

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Scripts

test/Scripts/macho-dump: Make hack for Python-2.4. [PR7995]

2010-10-29 01:14:16 +00:00

TableGen

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Transforms

Change instcombine's getShuffleMask to represent undef with negative values.

2010-10-29 22:03:05 +00:00

Unit

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Verifier

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CMakeLists.txt

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lit.cfg

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lit.site.cfg.in

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Makefile

test/Makefile: Force lit -j1 on Cygwin.

2010-10-22 09:40:37 +00:00

Makefile.tests

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site.exp.in

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TestRunner.sh

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