Anton Korobeynikov 8f8e9f0830 It seems that OR operation does not affect status reg at all. ...

Remove impdef of SRW. This fixes PR4779


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83739 91177308-0d34-0410-b5e6-96231b3b80d8

2009-10-10 22:17:47 +00:00

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Alpha

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ARM

Update this test; the code is the same but it gets counted as one

2009-10-09 23:31:04 +00:00

Blackfin

Coalescer should not delete extract_subreg, insert_subreg, and subreg_to_reg of

2009-09-28 05:28:43 +00:00

CBackend

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CellSPU

Convert more tests to avoid llvm-as.

2009-09-11 18:36:27 +00:00

CPP

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Generic

Convert more tests to avoid llvm-as.

2009-09-11 18:36:27 +00:00

Mips

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MSP430

It seems that OR operation does not affect status reg at all.

2009-10-10 22:17:47 +00:00

PIC16

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PowerPC

Add nounwind to this test.

2009-09-24 20:20:08 +00:00

SPARC

several major improvements to the sparc backend: support for weak linkage

2009-09-15 17:46:24 +00:00

SystemZ

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Thumb

Forgot about ARM::tPUSH. It also has a new writeback operand.

2009-10-02 05:03:07 +00:00

Thumb2

Fix tests.

2009-10-02 06:53:57 +00:00

X86

Fix the x86 test-shrink optimization so that it doesn't shrink comparisons

2009-10-09 20:35:19 +00:00

XCore

Add some peepholes for signed comparisons using ashr X, X, 32.

2009-10-08 15:38:17 +00:00