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llvm-6502/lib/Target/SparcV8
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Brian Gaeke 6672f86a4d I think this will handle double args. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16618 91177308-0d34-0410-b5e6-96231b3b80d8
2004-09-30 19:44:32 +00:00
..
DelaySlotFiller.cpp Use TargetMachine::hasDelaySlot() instead of our old switch statement 2004-09-30 04:04:47 +00:00
FPMover.cpp
Makefile
README.txt Update list of shootout programs that should be working. 2004-09-29 20:45:06 +00:00
SparcV8.h
SparcV8.td
SparcV8AsmPrinter.cpp Don't use .quad to output double constants. The assembler must have a bug or 2004-09-29 19:59:06 +00:00
SparcV8CodeEmitter.cpp
SparcV8InstrFormats.td
SparcV8InstrInfo.cpp Recognize FpMOVD as a move. 2004-09-29 16:45:47 +00:00
SparcV8InstrInfo.h
SparcV8InstrInfo.td Mark the instructions that have delay slots with the hasDelaySlot flag. 2004-09-30 04:04:48 +00:00
SparcV8ISelSimple.cpp I think this will handle double args. 2004-09-30 19:44:32 +00:00
SparcV8JITInfo.h
SparcV8RegisterInfo.cpp Use FpMOVD pseudo-instruction to move doubles around. 2004-09-29 03:27:30 +00:00
SparcV8RegisterInfo.h
SparcV8RegisterInfo.td
SparcV8TargetMachine.cpp Fix double and long alignment. 2004-09-29 03:26:27 +00:00
SparcV8TargetMachine.h

README.txt 

SparcV8 backend skeleton
------------------------

This directory houses a 32-bit SPARC V8 backend employing a expander-based
instruction selector.  It is not yet functionally complete.  Watch
this space for more news coming soon!

Current shootout results as of 28-Sept-2004
-------------------------------------------

Working: ackermann fib2 hash hello lists matrix methcall nestedloop
         objinst sieve strcat random ary3 
Broken: heapsort

To-do
-----

* support 64-bit (double FP, long, ulong) arguments to functions
* support functions with more than 6 args
* support setcc on longs
* support basic binary operations on longs
* support casting <=32-bit integers, bools to long
* support casting 64-bit integers to FP types

$Date$