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6be48d49cf
generated. This feature would only show up in fairly complex patterns, such
as this one in CellSPU:
def : Pat<(add (SPUhi tconstpool:$in, 0), (SPUlo tconstpool:$in, 0)),
(IOHLlo (ILHUhi tconstpool:$in), tconstpool:$in)>;
which generated the following emit code:
SDNode *Emit_0(const SDOperand &N, unsigned Opc0, unsigned Opc1, MVT::ValueType VT0, MVT::ValueType VT1) DISABLE_INLINE {
SDOperand N0 = N.getOperand(0);
SDOperand N00 = N0.getOperand(0);
SDOperand N01 = N0.getOperand(1);
SDOperand N1 = N.getOperand(1);
SDOperand N10 = N1.getOperand(0);
SDOperand N11 = N1.getOperand(1);
SDOperand Tmp3(CurDAG->getTargetNode(Opc0, VT0, N00), 0);
return CurDAG->SelectNodeTo(N.Val, Opc1, VT1, Tmp3, Tmp2); /* Tmp2 s/b N00 */
}
Tested against the test suites without incident.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46487 91177308-0d34-0410-b5e6-96231b3b80d8