Jyotsna Verma 0e58d92628 Hexagon: Expand br_cc. ...

It fixes following tests for Hexagon:

CodeGen/Generic/2003-07-29-BadConstSbyte.ll
CodeGen/Generic/2005-10-21-longlonggtu.ll
CodeGen/Generic/2009-04-28-i128-cmp-crash.ll
CodeGen/Generic/MachineBranchProb.ll
CodeGen/Generic/builtin-expect.ll
CodeGen/Generic/pr12507.ll



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178794 91177308-0d34-0410-b5e6-96231b3b80d8

2013-04-04 21:18:26 +00:00

..

InstPrinter

Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.

2013-02-20 16:13:27 +00:00

MCTargetDesc

Hexagon: Disable DwarfUsesInlineInfoSection flag.

2013-03-29 15:46:12 +00:00

TargetInfo

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

CMakeLists.txt

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

Hexagon.h

Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.

2013-02-20 16:13:27 +00:00

Hexagon.td

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HexagonAsmPrinter.cpp

Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.

2013-02-20 16:13:27 +00:00

HexagonAsmPrinter.h

Delete executive bit on ./lib/Target/Hexagon/HexagonAsmPrinter.h.

2012-12-29 15:23:06 +00:00

HexagonCallingConv.td

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HexagonCallingConvLower.cpp

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

HexagonCallingConvLower.h

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HexagonCFGOptimizer.cpp

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HexagonExpandPredSpillCode.cpp

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HexagonFixupHwLoops.cpp

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

HexagonFrameLowering.cpp

Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo

2013-02-21 20:05:00 +00:00

HexagonFrameLowering.h

Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo

2013-02-21 20:05:00 +00:00

HexagonHardwareLoops.cpp

Remove unused typedef.

2013-04-01 13:46:15 +00:00

HexagonInstrFormats.td

Hexagon: Change insn class to support instruction encoding.

2013-02-14 19:57:17 +00:00

HexagonInstrFormatsV4.td

Hexagon: Change insn class to support instruction encoding.

2013-02-14 19:57:17 +00:00

HexagonInstrInfo.cpp

Hexagon: Add emitFrameIndexDebugValue function to emit debug information.

2013-03-29 21:09:53 +00:00

HexagonInstrInfo.h

Hexagon: Add emitFrameIndexDebugValue function to emit debug information.

2013-03-29 21:09:53 +00:00

HexagonInstrInfo.td

Hexagon: Replace switch-case in isDotNewInst with TSFlags.

2013-03-28 19:44:04 +00:00

HexagonInstrInfoV3.td

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HexagonInstrInfoV4.td

Hexagon: Use multiclass for gp-relative instructions.

2013-03-28 16:25:57 +00:00

HexagonInstrInfoV5.td

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HexagonIntrinsics.td

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HexagonIntrinsicsDerived.td

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HexagonIntrinsicsV3.td

…

HexagonIntrinsicsV4.td

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HexagonIntrinsicsV5.td

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HexagonISelDAGToDAG.cpp

Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.

2013-03-22 18:41:34 +00:00

HexagonISelLowering.cpp

Hexagon: Expand br_cc.

2013-04-04 21:18:26 +00:00

HexagonISelLowering.h

Hexagon: Add support to lower block address.

2013-03-07 19:10:28 +00:00

HexagonMachineFunctionInfo.h

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HexagonMachineScheduler.cpp

Cleanup #includes.

2013-03-10 13:11:23 +00:00

HexagonMachineScheduler.h

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HexagonMCInstLower.cpp

Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.

2013-02-20 16:13:27 +00:00

HexagonNewValueJump.cpp

There is no longer any need to silence this compiler warning as the warning has

2013-03-31 17:44:09 +00:00

HexagonOperands.td

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HexagonPeephole.cpp

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

HexagonRegisterInfo.cpp

Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.

2013-03-22 18:41:34 +00:00

HexagonRegisterInfo.h

Remove code copied from GenRegisterInfo.inc.

2013-02-22 01:15:08 +00:00

HexagonRegisterInfo.td

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HexagonRemoveSZExtArgs.cpp

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

HexagonSchedule.td

Hexagon: Change insn class to support instruction encoding.

2013-02-14 19:57:17 +00:00

HexagonScheduleV4.td

Hexagon: Change insn class to support instruction encoding.

2013-02-14 19:57:17 +00:00

HexagonSelectCCInfo.td

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HexagonSelectionDAGInfo.cpp

…

HexagonSelectionDAGInfo.h

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HexagonSplitTFRCondSets.cpp

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HexagonSubtarget.cpp

Hexagon: Add and enable memops setbit, clrbit, &,|,+,- for byte, short, and word.

2013-03-22 18:41:34 +00:00

HexagonSubtarget.h

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HexagonTargetMachine.cpp

Hexagon: Disable optimizations at O0.

2013-03-27 11:14:24 +00:00

HexagonTargetMachine.h

Switch TargetTransformInfo from an immutable analysis pass that requires

2013-01-07 01:37:14 +00:00

HexagonTargetObjectFile.cpp

Move all of the header files which are involved in modelling the LLVM IR

2013-01-02 11:36:10 +00:00

HexagonTargetObjectFile.h

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HexagonVarargsCallingConvention.h

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HexagonVLIWPacketizer.cpp

Hexagon: Replace switch-case in isDotNewInst with TSFlags.

2013-03-28 19:44:04 +00:00

LLVMBuild.txt

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Makefile

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