Brian Gaeke 6c868a4c17 Support generating machine instructions for Phi nodes (based on x86, but with ... modifications for 1 LLVM BB --> many MBBs). Fix store operand order: make it always be Base, Offset, SrcReg (think "[ Base + Offset ] = SrcReg"). Rewrite visitBranchInst() to be even dumber (but working) -- give up on the branch fallthrough trick, for the time being. Make visitSetCondInst() work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14208 91177308-0d34-0410-b5e6-96231b3b80d8		2004-06-17 22:34:08 +00:00
..
CBackend	Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID()	2004-06-17 18:19:28 +00:00
PowerPC	Add file comment.	2004-06-14 15:13:59 +00:00
Sparc	Support generating machine instructions for Phi nodes (based on x86, but with	2004-06-17 22:34:08 +00:00
SparcV8	Support generating machine instructions for Phi nodes (based on x86, but with	2004-06-17 22:34:08 +00:00
SparcV9	Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID()	2004-06-17 18:19:28 +00:00
X86	Do not fold loads into instructions if it is used more than once. In particular	2004-06-17 22:15:25 +00:00
Makefile
MRegisterInfo.cpp
Target.td
TargetData.cpp	Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID()	2004-06-17 18:19:28 +00:00
TargetFrameInfo.cpp	Move implementations of functions here, which avoids #including <cstdlib> in the	2004-03-11 23:52:43 +00:00
TargetInstrInfo.cpp
TargetMachine.cpp	Method has been inlined into all callers	2004-06-02 05:55:48 +00:00
TargetSchedInfo.cpp	Adjust to new TM interface	2004-06-02 05:56:04 +00:00