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Mihai Popa 16ad92ad3c This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183733 91177308-0d34-0410-b5e6-96231b3b80d8

2013-06-11 09:39:51 +00:00

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This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3.

2013-06-11 09:39:51 +00:00

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[mips] DSP-ASE move from HI/LO register instructions.

2013-04-18 00:52:44 +00:00

[SystemZ] Immediate compare-and-branch support

2013-05-29 11:58:52 +00:00

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[XCore] Add LDAPB instructions.

2013-05-05 13:36:53 +00:00