Anand Shukla 6da69e75ec Added special consideration for instrumentation strategy ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7208 91177308-0d34-0410-b5e6-96231b3b80d8

2003-07-20 15:39:30 +00:00

..

InstrSched

A def. operand of a machine instruction may be an ordinary Value*,

2003-07-02 01:16:01 +00:00

InstrSelection

Choose register instead of immediate for ConstantExpr in ChooseRegOrImmed.

2003-07-06 20:33:21 +00:00

LiveVar

Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()

2003-05-27 00:06:48 +00:00

ModuloScheduling

add some comments

2003-06-10 20:04:30 +00:00

RegAlloc

isMarkedForSpill() should be const.

2003-07-10 19:45:28 +00:00

.cvsignore

Since there is now another derived .inc file, ignore them all.

2003-05-29 20:15:27 +00:00

EmitBytecodeToAssembly.cpp

changed implementation of LLVM BYTECODE Length

2002-07-25 17:22:48 +00:00

MachineCodeForInstruction.h

Remove a ton of extraneous #includes

2003-06-22 03:08:05 +00:00

MachineFunctionInfo.h

State for frame and constant pool information pulled out of MachineFunction

2002-12-28 20:07:33 +00:00

MachineInstrAnnot.h

Values stored in CallArgsDescriptor cannot be const.

2003-07-10 19:46:15 +00:00

Makefile

Merged in autoconf branch. This provides configuration via the autoconf

2003-06-30 21:59:07 +00:00

MappingInfo.cpp

lib/CodeGen/Mapping/MappingInfo.cpp:

2003-06-04 22:07:12 +00:00

MappingInfo.h

Add file comment. Include <vector> and <string>. Update include guards

2003-06-04 22:02:47 +00:00

SparcV9_F2.td

Encode predict = 1 by default, because the Sparc assembler does this.

2003-07-15 21:26:49 +00:00

SparcV9_F3.td

No need for a second immediate field if the class already inherits one.

2003-07-15 21:27:14 +00:00

SparcV9_F4.td

The name should really be `simm11' to follow the naming convention, but this has

2003-07-16 20:27:44 +00:00

SparcV9_Reg.td

* Broke up SparcV9.td into separate files as it was getting unmanageable

2003-05-29 03:31:43 +00:00

SparcV9.burg.in

Fold cast-to-bool into not. Later, this should also be folded into other

2003-07-10 19:47:42 +00:00

SparcV9.td

Elaborated assembly syntax of instructions in the comments.

2003-07-07 22:18:42 +00:00

SparcV9AsmPrinter.cpp

The word separate' only has one e'.

2003-07-14 17:20:40 +00:00

SparcV9CodeEmitter.cpp

Fixed the number translation scheme for the integer condition code registers: it

2003-07-16 20:30:40 +00:00

SparcV9CodeEmitter.h

Fixed the number translation scheme for the integer condition code registers: it

2003-07-16 20:30:40 +00:00

SparcV9Instr.def

RDCCR defines arg. #1, not arg. #2.

2003-06-20 11:32:11 +00:00

SparcV9InstrInfo.cpp

Bug fix in creating constants: need 1U << 31, not 1 << 31.

2003-07-10 19:48:19 +00:00

SparcV9InstrSelection.cpp

Several important bug fixes:

2003-07-10 20:07:54 +00:00

SparcV9InstrSelectionSupport.h

* Changed Bcc instructions to behave like BPcc instructions

2003-06-06 09:52:23 +00:00

SparcV9Internals.h

Added special consideration for instrumentation strategy

2003-07-20 15:39:30 +00:00

SparcV9PeepholeOpts.cpp

Cleaned up code layout; no functional changes.

2003-05-23 19:20:57 +00:00

SparcV9PreSelection.cpp

(1) Major bug fix: DecomposeArrayRef() replaces its argument instr. and

2003-07-02 01:23:15 +00:00

SparcV9PrologEpilogInserter.cpp

* Changed Bcc instructions to behave like BPcc instructions

2003-06-06 09:52:23 +00:00

SparcV9RegClassInfo.cpp

Several fixes to handling of int CC register:

2003-07-10 19:42:11 +00:00

SparcV9RegClassInfo.h

Added special consideration for instrumentation strategy

2003-07-20 15:39:30 +00:00

SparcV9RegInfo.cpp

Added special consideration for instrumentation strategy

2003-07-20 15:39:30 +00:00

SparcV9SchedInfo.cpp

Added 'r' and 'i' versions to WRCCR.

2003-06-06 09:52:58 +00:00

SparcV9StackSlots.cpp

Rename MachineInstrInfo -> TargetInstrInfo

2003-01-14 22:00:31 +00:00

SparcV9TargetMachine.cpp

lib/Target/Sparc/Sparc.cpp:

2003-06-18 21:14:23 +00:00