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a14b1ded69
errors when thrown. This gets us nice errors like this from tblgen: CMOVL32rr: (set GR32:i32:$dst, (X86cmov GR32:$src1, GR32:$src2)) /Users/sabre/llvm/Debug/bin/tblgen: error: Included from X86.td:116: Parsing X86InstrInfo.td:922: In CMOVL32rr: X86cmov node requires exactly 4 operands! def CMOVL32rr : I<0x4C, MRMSrcReg, // if <s, GR32 = GR32 ^ instead of just: CMOVL32rr: (set GR32:i32:$dst, (X86cmov GR32:$src1, GR32:$src2)) /Users/sabre/llvm/Debug/bin/tblgen: In CMOVL32rr: X86cmov node requires exactly 4 operands! This is all I plan to do with this, but it should be easy enough to improve if anyone cares (e.g. keeping more loc info in "dag" expr records in tblgen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66898 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
AsmWriterEmitter.cpp | ||
AsmWriterEmitter.h | ||
CallingConvEmitter.cpp | ||
CallingConvEmitter.h | ||
CMakeLists.txt | ||
CodeEmitterGen.cpp | ||
CodeEmitterGen.h | ||
CodeGenDAGPatterns.cpp | ||
CodeGenDAGPatterns.h | ||
CodeGenInstruction.cpp | ||
CodeGenInstruction.h | ||
CodeGenIntrinsics.h | ||
CodeGenRegisters.h | ||
CodeGenTarget.cpp | ||
CodeGenTarget.h | ||
DAGISelEmitter.cpp | ||
DAGISelEmitter.h | ||
FastISelEmitter.cpp | ||
FastISelEmitter.h | ||
InstrEnumEmitter.cpp | ||
InstrEnumEmitter.h | ||
InstrInfoEmitter.cpp | ||
InstrInfoEmitter.h | ||
IntrinsicEmitter.cpp | ||
IntrinsicEmitter.h | ||
LLVMCConfigurationEmitter.cpp | ||
LLVMCConfigurationEmitter.h | ||
Makefile | ||
Record.cpp | ||
Record.h | ||
RegisterInfoEmitter.cpp | ||
RegisterInfoEmitter.h | ||
SubtargetEmitter.cpp | ||
SubtargetEmitter.h | ||
TableGen.cpp | ||
TableGenBackend.cpp | ||
TableGenBackend.h | ||
TGLexer.cpp | ||
TGLexer.h | ||
TGParser.cpp | ||
TGParser.h | ||
TGSourceMgr.cpp | ||
TGSourceMgr.h | ||
TGValueTypes.cpp |