mirror of
				https://github.com/c64scene-ar/llvm-6502.git
				synced 2025-11-03 14:21:30 +00:00 
			
		
		
		
	Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
		
	
		
			
				
	
	
		
			69 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
			
		
		
	
	
			69 lines
		
	
	
		
			1.4 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
; RUN:  llvm-dis < %s.bc| FileCheck %s
 | 
						|
; RUN:  verify-uselistorder < %s.bc
 | 
						|
 | 
						|
; case-ranges.ll.bc was generated by passing this file to llvm-as from the 3.3
 | 
						|
; release of LLVM. This tests that the bitcode for switches from that release
 | 
						|
; can still be read.
 | 
						|
 | 
						|
define i32 @foo(i32 %x) nounwind ssp uwtable {
 | 
						|
; CHECK: define i32 @foo
 | 
						|
  %1 = alloca i32, align 4
 | 
						|
  %2 = alloca i32, align 4
 | 
						|
  store i32 %x, i32* %2, align 4
 | 
						|
  %3 = load i32, i32* %2, align 4
 | 
						|
  switch i32 %3, label %9 [
 | 
						|
; CHECK: switch i32 %3, label %9
 | 
						|
    i32 -3, label %4
 | 
						|
; CHECK-NEXT: i32 -3, label %4
 | 
						|
    i32 -2, label %4
 | 
						|
; CHECK-NEXT: i32 -2, label %4
 | 
						|
    i32 -1, label %4
 | 
						|
; CHECK-NEXT: i32 -1, label %4
 | 
						|
    i32 0, label %4
 | 
						|
; CHECK-NEXT: i32 0, label %4
 | 
						|
    i32 1, label %4
 | 
						|
; CHECK-NEXT: i32 1, label %4
 | 
						|
    i32 2, label %4
 | 
						|
; CHECK-NEXT: i32 2, label %4
 | 
						|
    i32 4, label %5
 | 
						|
; CHECK-NEXT: i32 4, label %5
 | 
						|
    i32 5, label %6
 | 
						|
; CHECK-NEXT: i32 5, label %6
 | 
						|
    i32 6, label %7
 | 
						|
; CHECK-NEXT: i32 6, label %7
 | 
						|
    i32 7, label %8
 | 
						|
; CHECK-NEXT: i32 7, label %8
 | 
						|
  ]
 | 
						|
 | 
						|
; <label>:4
 | 
						|
  store i32 -1, i32* %1
 | 
						|
  br label %11
 | 
						|
 | 
						|
; <label>:5
 | 
						|
  store i32 2, i32* %1
 | 
						|
  br label %11
 | 
						|
 | 
						|
; <label>:6
 | 
						|
  store i32 1, i32* %1
 | 
						|
  br label %11
 | 
						|
 | 
						|
; <label>:7
 | 
						|
  store i32 4, i32* %1
 | 
						|
  br label %11
 | 
						|
 | 
						|
; <label>:8
 | 
						|
  store i32 3, i32* %1
 | 
						|
  br label %11
 | 
						|
 | 
						|
; <label>:9
 | 
						|
  br label %10
 | 
						|
 | 
						|
; <label>:10
 | 
						|
  store i32 0, i32* %1
 | 
						|
  br label %11
 | 
						|
 | 
						|
; <label>:11
 | 
						|
  %12 = load i32, i32* %1
 | 
						|
  ret i32 %12
 | 
						|
}
 |