Robert Wilhelm f80a63fa23 Fix spelling intruction -> instruction. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191610 91177308-0d34-0410-b5e6-96231b3b80d8

2013-09-28 11:46:15 +00:00

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AArch64

llvm/test/CodeGen/AArch64/neon-scalar-reduce-pairwise.ll: Use -mtriple here, or aach64-pecoff might be misassumed on win32 hosts.

2013-09-24 04:14:29 +00:00

ARM

Fix PR 17372: Emitting PLD for stack address for ARM Thumb2

2013-09-26 17:25:10 +00:00

CPP

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Generic

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Hexagon

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Inputs

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Mips

[mips] Make sure loads from lazy-binding entries do not get CSE'd or hoisted out

2013-09-28 00:12:32 +00:00

MSP430

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NVPTX

[NVPTX] Make constant vector test case endian-independent

2013-09-19 13:14:44 +00:00

PowerPC

Fix spelling intruction -> instruction.

2013-09-28 11:46:15 +00:00

R600

R600: Fix handling of NAN in comparison instructions

2013-09-28 02:50:50 +00:00

SPARC

[Sparc] Implements exception handling in SPARC with DwarfCFI.

2013-09-26 15:11:00 +00:00

SystemZ

TBAA: handle scalar TBAA format and struct-path aware TBAA format.

2013-09-27 18:34:27 +00:00

Thumb

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Thumb2

Fix spelling intruction -> instruction.

2013-09-28 11:46:15 +00:00

X86

Adding intrinsics to the llvm backend for TBM instruction set.

2013-09-27 18:38:42 +00:00

XCore

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