llvm-6502/test/MC
David Peixotto 6f9a004738 Add ARM fconsts/fconstd aliases for vmov.f32/vmov.f64
This commit adds the pre-UAL aliases of fconsts and fconstd for
vmov.f32 and vmov.f64. They use an InstAlias rather than a
MnemonicAlias to properly support the predicate operand.

We need to support encoded 8-bit constants in order to implement the
pre-UAL fconsts/fconstd aliases for vmov.f32/vmov.f64, so this
commit also fixes parsing of encoded floating point constants used
in vmov.f32/vmov.f64 instructions. Now we can support assembly code
like this:

  fconsts s0, #0x70

which is equivalent to vmov.f32 s0, #1.0.

Most of the code was already in place to support this feature.
Previously the code was trying to accept encoded 8-bit float
constants for the vmov.f32/vmov.f64 instructions.  It looks like the
support for parsing encoded floats was lost in a refactoring in
commit r148556 and we did not have any tests in place to catch it.

The change in this commit is to keep the parsed value as a 32-bit
float instead of a 64-bit double because that is what the isFPImm()
function expects to find. There is no loss of precision by using a
32-bit float here because we are still limited to an 8-bit encoded
value in the end.

Additionally, we explicitly reject encoded 8-bit floats for
vmovf.32/64. This is the same as the current behavior, but we now do
it explicitly rather than accidently.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198697 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-07 18:19:23 +00:00
..
AArch64 [AArch64][NEON] Added SXTL and SXTL2 instruction aliases 2014-01-03 19:20:31 +00:00
ARM Add ARM fconsts/fconstd aliases for vmov.f32/vmov.f64 2014-01-07 18:19:23 +00:00
AsmParser Mark the 64-bit x86 push/pop instructions as In64BitMode. Mark the corresponding 32-bit versions with the same encodings Not64BitMode. Remove hack from tablegen disassembler table emitter. Fix bad test. 2014-01-05 01:35:51 +00:00
COFF Add the .secidx test I've forgotten to svn add in 197826 2013-12-20 19:06:50 +00:00
Disassembler [Sparc] Add initial implementation of disassembler for sparc 2014-01-06 08:08:58 +00:00
ELF Correct word hyphenations 2013-12-05 05:44:44 +00:00
MachO Fixed a bug in getARMFixupKindMachOInfo() where three ARM fixup kinds 2013-12-13 22:46:54 +00:00
Markup
Mips [Mips] TargetStreamer Support for .abicalls and .set pic0. 2014-01-06 23:27:31 +00:00
PowerPC Convert another llc -filetype=obj test. 2013-10-28 22:17:19 +00:00
Sparc [Sparc] Add support for parsing sparc asm modifiers such as %hi, %lo etc., 2014-01-07 08:00:49 +00:00
SystemZ [SystemZ] Add MC support for interlocked-access 1 instructions 2013-12-24 15:14:05 +00:00
X86 Add OpSize16 bit, for instructions which need 0x66 prefix in 16-bit mode 2014-01-06 06:02:58 +00:00