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70fec687442b2cbd56baeec31fd504020723377d
llvm-6502/test/CodeGen
History
Sasa Stankovic 84d236137f [mips] Don't use odd-numbered single precision registers for fastcc calling
convention if -mno-odd-spreg is used.

Differential Revision: http://reviews.llvm.org/D4682


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214180 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-29 14:39:24 +00:00
..
AArch64
Implement AArch64 TTI interface isAsCheapAsAMove.
2014-07-29 02:09:26 +00:00
ARM
ARM: add __aeabi_d2h for truncation on AEABI systems
2014-07-29 09:56:45 +00:00
CPP
…
Generic
Add @llvm.assume, lowering, and some basic properties
2014-07-25 21:13:35 +00:00
Hexagon
…
Inputs
…
Mips
[mips] Don't use odd-numbered single precision registers for fastcc calling
2014-07-29 14:39:24 +00:00
MSP430
…
NVPTX
[NVPTX] Add some extra tests for mul.wide to test non-power-of-two source types
2014-07-23 20:23:49 +00:00
PowerPC
[PowerPC] Fix ppc64-elf-abi.ll test case on Darwin
2014-07-29 12:48:14 +00:00
R600
R600: Modernize test
2014-07-28 18:06:08 +00:00
SPARC
…
SystemZ
…
Thumb
[stack protector] Add test cases for thumb and thumb2.
2014-07-25 19:47:46 +00:00
Thumb2
[stack protector] Add test cases for thumb and thumb2.
2014-07-25 19:47:46 +00:00
X86
[Debug Info] add DISubroutineType and its creation takes DITypeArray.
2014-07-28 22:24:06 +00:00
XCore
llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.
2014-07-04 11:58:03 +00:00
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