Tim Northover 71313f88cb ARM: use natural LLVM IR for vshll instructions ... Similarly to the vshrn instructions, these are simple zext/sext + trunc operations. Using normal LLVM IR should allow for better code, and more sharing with the AArch64 backend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201093 91177308-0d34-0410-b5e6-96231b3b80d8		2014-02-10 16:20:29 +00:00
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AArch64	[AArch64]Implement the copy of two FPR8 registers by using FMOVss of two FPR32 registers in copyPhysReg.	2014-02-10 03:16:22 +00:00
ARM	ARM: use natural LLVM IR for vshll instructions	2014-02-10 16:20:29 +00:00
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Mips	[mips][msa] Add DLSA instruction.	2014-02-10 12:05:17 +00:00
MSP430
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PowerPC
R600	R600/SI: Add failing test for 3 x i64 vectors.	2014-02-07 20:29:40 +00:00
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X86	Test commit - added a new line to vec_shuf-insert.ll.	2014-02-10 12:42:13 +00:00
XCore