Bob Wilson 1665b0a224 Fix pr6111: Avoid using the LR register for the target address of an indirect ...

branch in ARM v4 code, since it gets clobbered by the return address before
it is used.  Instead of adding a new register class containing all the GPRs
except LR, just use the existing tGPR class.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96360 91177308-0d34-0410-b5e6-96231b3b80d8

2010-02-16 17:24:15 +00:00

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Alpha

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ARM

Fix pr6111: Avoid using the LR register for the target address of an indirect

2010-02-16 17:24:15 +00:00

Blackfin

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CBackend

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CellSPU

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CPP

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Generic

Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there

2010-02-15 22:35:59 +00:00

Mips

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MSP430

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PIC16

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PowerPC

When save/restoring CR at prolog/epilog, in a large

2010-02-12 21:35:34 +00:00

SPARC

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SystemZ

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Thumb

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Thumb2

Last week we were generating code with duplicate induction variables in this

2010-02-15 21:56:40 +00:00

X86

Split the main for-each-use loop again, this time for GenerateTruncates,

2010-02-16 01:42:53 +00:00

XCore

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