Krzysztof Parzyszek 71490fa946 Extend Hexagon hardware loop generation to handle various additional cases: ...

- variety of compare instructions,
- loops with no preheader,
- arbitrary lower and upper bounds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174904 91177308-0d34-0410-b5e6-96231b3b80d8

2013-02-11 21:37:55 +00:00

..

absaddr-store.ll

Hexagon: Use multiclass for absolute addressing mode stores.

2013-02-05 18:15:34 +00:00

args.ll

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cmp_pred_reg.ll

Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle

2013-02-05 19:20:45 +00:00

cmp_pred.ll

Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle

2013-02-05 19:20:45 +00:00

cmp-to-genreg.ll

Hexagon: Add V4 compare instructions. Enable relationship mapping

2013-02-05 16:42:24 +00:00

cmp-to-predreg.ll

Hexagon: Add V4 compare instructions. Enable relationship mapping

2013-02-05 16:42:24 +00:00

cmpb_pred.ll

Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle

2013-02-05 19:20:45 +00:00

combine_ir.ll

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combine.ll

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convertdptoint.ll

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convertdptoll.ll

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convertsptoint.ll

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convertsptoll.ll

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dadd.ll

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dmul.ll

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double.ll

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doubleconvert-ieee-rnd-near.ll

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dsub.ll

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dualstore.ll

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fadd.ll

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fcmp.ll

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float.ll

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floatconvert-ieee-rnd-near.ll

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fmul.ll

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frame.ll

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fsub.ll

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fusedandshift.ll

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hwloop-cleanup.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

hwloop-const.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

hwloop-dbg.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

hwloop-le.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

hwloop-lt1.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

hwloop-lt.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

hwloop-ne.ll

Extend Hexagon hardware loop generation to handle various additional cases:

2013-02-11 21:37:55 +00:00

idxload-with-zero-offset.ll

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lit.local.cfg

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macint.ll

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mpy.ll

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newvaluejump2.ll

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newvaluejump.ll

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newvaluestore.ll

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opt-fabs.ll

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opt-fneg.ll

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postinc-load.ll

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postinc-store.ll

Hexagon: Add testcase for post-increment store instructions.

2013-02-05 18:23:51 +00:00

remove_lsr.ll

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simpletailcall.ll

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static.ll

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struct_args_large.ll

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struct_args.ll

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vaddh.ll

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validate-offset.ll

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