Sirish Pande 71d56462a1 Extensions of Hexagon V4 instructions. ...

This adds new instructions for Hexagon V4 architecture.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156071 91177308-0d34-0410-b5e6-96231b3b80d8

2012-05-03 16:18:50 +00:00

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Analysis

Just mark the sign bit as known zero, rather than any other irrelevant bits

2012-04-30 11:56:58 +00:00

Archive

Include cstdio in a few place that depended on getting it transitively through StringExtras.h

2012-03-23 11:35:30 +00:00

AsmParser

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Bitcode

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CodeGen

Fix two-address pass's aggressive instruction commuting heuristics. It's meant

2012-05-03 01:45:13 +00:00

DebugInfo

Fix a C++11 UDL conflict.

2012-04-04 20:33:56 +00:00

ExecutionEngine

RuntimeDyld cleanup:

2012-05-01 10:41:12 +00:00

Linker

Add a flag to the struct type finder to collect only those types which have

2012-04-21 23:59:16 +00:00

MC

MC: Unknown assembler directives are now hard errors.

2012-05-01 18:38:27 +00:00

Object

Fix the implementation of MachOObjectFile::isSectionZeroInit so it follows the MachO spec.

2012-05-02 02:31:28 +00:00

Support

Change the Intel Atom detection code to recognize

2012-05-02 21:38:46 +00:00

TableGen

Move llvm-tblgen's StringMatcher into the TableGen library so it can

2012-05-02 17:32:48 +00:00

Target

Extensions of Hexagon V4 instructions.

2012-05-03 16:18:50 +00:00

Transforms

replace 'break's with 'return 0' in visitCallInst code for objectsize, since there is no need to fallback to visitCallSite.

2012-05-03 16:06:07 +00:00

VMCore

Reapply r155682, making constant folding more consistent, with a fix to work

2012-04-27 17:50:22 +00:00

CMakeLists.txt

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LLVMBuild.txt

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Makefile

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