Bill Schmidt 71fe60ef10 The ordering of two relocations on the same instruction is apparently not ...

predictable when compiled on at least one non-PowerPC host.  Source of
nondeterminism not apparent.  Restrict the test to build on PowerPC hosts
for now while looking into the issue further.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170016 91177308-0d34-0410-b5e6-96231b3b80d8

2012-12-12 20:29:20 +00:00

..

ARM

Some enhancements for memcpy / memset inline expansion.

2012-12-10 23:21:26 +00:00

CPP

…

Generic

move X86-specific test

2012-12-11 00:36:43 +00:00

Hexagon

In hexagon convertToHardwareLoop, don't deref end() iterator

2012-12-07 21:03:15 +00:00

MBlaze

…

Mips

[mips] Generate big GOT code.

2012-11-21 20:40:38 +00:00

MSP430

Add support for varargs functions for msp430.

2012-11-21 17:28:27 +00:00

NVPTX

[NVPTX] Fix crash with unnamed struct arguments

2012-12-05 20:50:28 +00:00

PowerPC

The ordering of two relocations on the same instruction is apparently not

2012-12-12 20:29:20 +00:00

R600

Add R600 backend

2012-12-11 21:25:42 +00:00

SI

Add R600 backend

2012-12-11 21:25:42 +00:00

SPARC

Use TargetTransformInfo to control switch-to-lookup table transformation

2012-10-30 11:23:25 +00:00

Thumb

Use the 'count' attribute to calculate the upper bound of an array.

2012-12-04 21:34:03 +00:00

Thumb2

Fix typos in CHECK lines.

2012-12-06 21:24:47 +00:00

X86

llvm/test/CodeGen/X86/atom-bypass-slow-division.ll: Fix possible typo(s) in CHECK-NOT lines.

2012-12-12 13:34:20 +00:00

XCore

Fix handling of aliases to functions.

2012-11-16 21:12:38 +00:00