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72062f5744
This patch adds support for AArch64 (ARM's 64-bit architecture) to
LLVM in the "experimental" category. Currently, it won't be built
unless requested explicitly.
This initial commit should have support for:
+ Assembly of all scalar (i.e. non-NEON, non-Crypto) instructions
(except the late addition CRC instructions).
+ CodeGen features required for C++03 and C99.
+ Compilation for the "small" memory model: code+static data <
4GB.
+ Absolute and position-independent code.
+ GNU-style (i.e. "__thread") TLS.
+ Debugging information.
The principal omission, currently, is performance tuning.
This patch excludes the NEON support also reviewed due to an outbreak of
batshit insanity in our legal department. That will be committed soon bringing
the changes to precisely what has been approved.
Further reviews would be gratefully received.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174054 91177308-0d34-0410-b5e6-96231b3b80d8
37 lines
1.1 KiB
LLVM
37 lines
1.1 KiB
LLVM
; RUN: llc -verify-machineinstrs -march=aarch64 < %s | FileCheck %s
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; When generating DAG selection tables, TableGen used to only flag an
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; instruction as needing a chain on its own account if it had a built-in pattern
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; which used the chain. This meant that the AArch64 load/stores weren't
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; recognised and so both loads from %locvar below were coalesced into a single
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; LS8_LDR instruction (same operands other than the non-existent chain) and the
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; increment was lost at return.
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; This was obviously a Bad Thing.
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declare void @bar(i8*)
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define i64 @test_chains() {
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; CHECK: test_chains:
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%locvar = alloca i8
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call void @bar(i8* %locvar)
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; CHECK: bl bar
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%inc.1 = load i8* %locvar
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%inc.2 = zext i8 %inc.1 to i64
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%inc.3 = add i64 %inc.2, 1
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%inc.4 = trunc i64 %inc.3 to i8
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store i8 %inc.4, i8* %locvar
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; CHECK: ldrb {{w[0-9]+}}, [sp, [[LOCADDR:#[0-9]+]]]
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; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, #1
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; CHECK: strb {{w[0-9]+}}, [sp, [[LOCADDR]]]
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; CHECK: ldrb {{w[0-9]+}}, [sp, [[LOCADDR]]]
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%ret.1 = load i8* %locvar
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%ret.2 = zext i8 %ret.1 to i64
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ret i64 %ret.2
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; CHECK: ret
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}
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