llvm-6502/test/CodeGen
Akira Hatanaka 7398bf01c2 Modify LowerFCOPYSIGN to handle Mips64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146080 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-07 21:48:50 +00:00
..
ARM [arm-fast-isel] Doublewords only require word-alignment. 2011-12-06 01:44:17 +00:00
CBackend
CellSPU
CPP
Generic
MBlaze
Mips Modify LowerFCOPYSIGN to handle Mips64. 2011-12-07 21:48:50 +00:00
MSP430
PowerPC delaying restore-cr changed assigned registers in some tests 2011-12-06 20:55:46 +00:00
PTX PTX: Continue to fix up the register mess. 2011-12-06 17:39:48 +00:00
SPARC Sparc CodeGen: Fix AnalyzeBranch for PR 10282. Removing addSuccessor() since 2011-12-03 21:24:48 +00:00
Thumb
Thumb2
X86 Support vector bitcasts in the AsmPrinter. PR11495. 2011-12-07 00:50:54 +00:00
XCore