Akira Hatanaka ad5f0c9e73 Change default target architecture from Mips1 to Mips32r1 in preparation for ... removing support for Mips1 and Mips2. This change and the ones that follow have been discussed with and approved by Bruno. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139344 91177308-0d34-0410-b5e6-96231b3b80d8		2011-09-09 01:13:27 +00:00
..
Alpha
ARM	Directly point debug info to the stack slot of the arugment, instead of trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges.	2011-09-08 22:59:09 +00:00
Blackfin
CBackend
CellSPU	Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction.	2011-09-02 10:05:01 +00:00
CPP
Generic	This test is already covered by llvm/trunk/test/CodeGen/X86/vsel.ll	2011-09-08 08:43:23 +00:00
MBlaze
Mips	Change default target architecture from Mips1 to Mips32r1 in preparation for	2011-09-09 01:13:27 +00:00
MSP430
PowerPC	Split the init.trampoline intrinsic, which currently combines GCC's	2011-09-06 13:37:06 +00:00
PTX
SPARC
SystemZ
Thumb	Disable these tests harder. They're XFAIL'd, but that means they still run, and	2011-09-06 22:08:18 +00:00
Thumb2	Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical	2011-08-30 01:34:54 +00:00
X86	Add a AVX version of a simple i64 -> f64 bitcast. This could be	2011-09-08 21:52:33 +00:00
XCore	Split the init.trampoline intrinsic, which currently combines GCC's	2011-09-06 13:37:06 +00:00