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llvm-6502/lib/Target
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Chris Lattner ec726a1a6e Add this back, as its absence introduces assertions, and it seems to work now 
that Instructions are annotable again


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12045 91177308-0d34-0410-b5e6-96231b3b80d8
2004-03-01 15:28:27 +00:00
..
CBackend
TargetCacheInfo has been removed; its only uses were to propagate a constant
2004-03-01 06:43:29 +00:00
PowerPC
fine grainify namespacification
2004-02-28 19:53:18 +00:00
Sparc
TargetCacheInfo has been removed; its only uses were to propagate a constant
2004-03-01 06:43:29 +00:00
SparcV8
TargetCacheInfo has been removed; its only uses were to propagate a constant
2004-03-01 06:43:29 +00:00
SparcV9
Add this back, as its absence introduces assertions, and it seems to work now
2004-03-01 15:28:27 +00:00
X86
TargetCacheInfo has been removed; its only uses were to propagate a constant
2004-03-01 06:43:29 +00:00
Makefile
SparcV8 now builds.
2004-02-28 19:54:00 +00:00
MRegisterInfo.cpp
Put all LLVM code into the llvm namespace, as per bug 109.
2003-11-11 22:41:34 +00:00
Target.td
Expose the "Other" value type to tablegen targets
2004-02-11 03:08:45 +00:00
TargetData.cpp
Use a map instead of annotations
2004-02-26 08:02:17 +00:00
TargetInstrInfo.cpp
Adjust to change in TII ctor arguments
2004-02-29 06:31:44 +00:00
TargetMachine.cpp
TargetCacheInfo has been removed; its only uses were to propagate a constant
2004-03-01 06:43:29 +00:00
TargetSchedInfo.cpp
Eliminate the distinction between "real" and "unreal" instructions
2004-02-29 06:31:16 +00:00