Nate Begeman 74d734574e Rewrite LowerCallTo and Select(ISD::CALL) to properly handle float varargs ...

Tell the SelectionDAG ISel to expand SEXTLOAD of i1 and i8, rather than
  complicate the code in ISD::SEXTLOAD to do it by hand
Combine the FP and Int ISD::LOAD codegen
Generate better code for constant pool loads

As a result, all of Shootout, and likely many other programs are now
working.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@20945 91177308-0d34-0410-b5e6-96231b3b80d8

2005-03-31 00:15:26 +00:00

..

Alpha

yea, fine Duraid

2005-03-30 18:22:52 +00:00

CBackend

Fix the 3 regressions last night, due to my buggy patch from yesterday.

2005-03-19 17:35:11 +00:00

IA64

Emit .global @function and .global @object entries so the Intel ias

2005-03-28 15:21:43 +00:00

PowerPC

Rewrite LowerCallTo and Select(ISD::CALL) to properly handle float varargs

2005-03-31 00:15:26 +00:00

Skeleton

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Sparc

This mega patch converts us from using Function::a{iterator|begin|end} to

2005-03-15 04:54:21 +00:00

SparcV8

This mega patch converts us from using Function::a{iterator|begin|end} to

2005-03-15 04:54:21 +00:00

SparcV9

Compare dependence analysis with llvm instructions versus machine instrutions. the problem with using machine instructions and alias analysis is that aa does not handle tmp instructions.

2005-03-29 20:35:10 +00:00

X86

don't depend on the cfg being set up yet

2005-03-30 01:10:00 +00:00

Makefile

build the IA64 target as a .so for now

2005-03-17 18:29:04 +00:00

MRegisterInfo.cpp

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Target.td

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TargetData.cpp

add a StructLayout::getElementContainingOffset method.

2005-03-13 19:04:41 +00:00

TargetFrameInfo.cpp

Fix compilation errors with VS 2005, patch contributed by Aaron Gray.

2005-02-17 21:40:27 +00:00

TargetInstrInfo.cpp

Finegrainify namespacification

2005-01-19 06:53:34 +00:00

TargetMachine.cpp

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TargetMachineRegistry.cpp

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TargetSchedInfo.cpp

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