Vladimir Medic d0fb85865a [Mips][Disassembler] When disassembler meets cache/pref instructions for r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method for R6 CACHE_HINT_DESC class that properly handles decoding of these instructions. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227430 91177308-0d34-0410-b5e6-96231b3b80d8

2015-01-29 11:33:41 +00:00

..

mips1

[mips] Make whitespace in disassembler tests more consistent. NFC.

2015-01-18 18:38:36 +00:00

mips2

[mips] Make whitespace in disassembler tests more consistent. NFC.

2015-01-18 18:38:36 +00:00

mips3

[mips] Make whitespace in disassembler tests more consistent. NFC.

2015-01-18 18:38:36 +00:00

mips4

[mips] 'CHECK :' is not a valid check directive. Fixed.

2015-01-18 18:43:10 +00:00

mips32

[mips] 'CHECK :' is not a valid check directive. Fixed.

2015-01-18 18:43:10 +00:00

mips32r2

[mips] 'CHECK :' is not a valid check directive. Fixed.

2015-01-18 18:43:10 +00:00

mips32r6

[Mips][Disassembler] When disassembler meets cache/pref instructions for r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method for R6 CACHE_HINT_DESC class that properly handles decoding of these instructions.

2015-01-29 11:33:41 +00:00

mips64

[mips] 'CHECK :' is not a valid check directive. Fixed.

2015-01-18 18:43:10 +00:00

mips64r2

[mips] 'CHECK :' is not a valid check directive. Fixed.

2015-01-18 18:43:10 +00:00

mips64r6

[Mips][Disassembler] When disassembler meets cache/pref instructions for r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method for R6 CACHE_HINT_DESC class that properly handles decoding of these instructions.

2015-01-29 11:33:41 +00:00

msa

[mips] Move disassembler test (test_2r_msa64) into correct folder.

2014-05-12 16:59:34 +00:00

lit.local.cfg

Reduce verbiage of lit.local.cfg files

2014-06-09 22:42:55 +00:00

micromips_le.txt

[mips][microMIPS] Implement LWGP instruction

2015-01-28 17:27:26 +00:00

micromips.txt

[mips][microMIPS] Implement LWGP instruction

2015-01-28 17:27:26 +00:00

mips2.txt

[mips] Fix disassembly of [ls][wd]c[23], cache, and pref

2014-10-01 08:26:55 +00:00

mips32_le.txt

This patch implements jalx instruction for Mips architecture.This instruction executes a procedure call within the current 256 MB-aligned region and change the ISA Mode from MIPS32 to microMIPS32 or MIPS16e. Usage samples for assembler and dissasembler are provided as well.

2014-03-03 13:12:59 +00:00

mips32.txt

[mips] Fix disassembly of [ls][wd]c[23], cache, and pref

2014-10-01 08:26:55 +00:00

mips32r2_le.txt

[mips] Add synci instruction.

2014-11-27 17:28:10 +00:00

mips32r2.txt

[mips] Add synci instruction.

2014-11-27 17:28:10 +00:00

mips32r6.txt

[mips][mips64r6] Correct cond names in the cmp.cond.[ds] instructions

2014-07-09 10:40:20 +00:00

mips64_le.txt

[mips] Use ptr_rc to simplify definitions of base+index load/store instructions.

2013-08-28 00:55:15 +00:00

mips64.txt

[mips] Fix disassembly of [ls][wd]c[23], cache, and pref

2014-10-01 08:26:55 +00:00

mips64r2_le.txt

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mips64r2.txt

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mips64r6.txt

[mips][mips64r6] Correct cond names in the cmp.cond.[ds] instructions

2014-07-09 10:40:20 +00:00

mips-dsp.txt

[mips] Use ptr_rc to simplify definitions of base+index load/store instructions.

2013-08-28 00:55:15 +00:00