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	Aside from the question of whether we report a warning or an error when we can't satisfy a requested stack object alignment, the current implementation of this is not good. We're not providing any source location in the diagnostics and the current warning is not connected to any warning group so you can't control it. We could improve the source location somewhat, but we can do a much better job if this check is implemented in the front-end, so let's do that instead. <rdar://problem/13127907> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174741 91177308-0d34-0410-b5e6-96231b3b80d8
		
			
				
	
	
		
			49 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
			
		
		
	
	
			49 lines
		
	
	
		
			1.6 KiB
		
	
	
	
		
			LLVM
		
	
	
	
	
	
; RUN: llc < %s -mtriple=armv7-apple-ios -O0 -realign-stack=0 | FileCheck %s -check-prefix=NO-REALIGN
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; RUN: llc < %s -mtriple=armv7-apple-ios -O0 | FileCheck %s
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; rdar://12713765
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; When realign-stack is set to false, make sure we are not creating stack
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; objects that are assumed to be 64-byte aligned.
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@T3_retval = common global <16 x float> zeroinitializer, align 16
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define void @test(<16 x float>* noalias sret %agg.result) nounwind ssp {
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entry:
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; CHECK: test
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; CHECK: bic sp, sp, #63
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; CHECK: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48
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; CHECK: vst1.64
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; CHECK: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32
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; CHECK: vst1.64
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; CHECK: orr [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16
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; CHECK: vst1.64
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; CHECK: vst1.64
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; CHECK: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48
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; CHECK: vst1.64
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; CHECK: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32
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; CHECK: vst1.64
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; CHECK: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16
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; CHECK: vst1.64
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; CHECK: vst1.64
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; NO-REALIGN: test
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; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48
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; NO-REALIGN: vst1.64
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; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32
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; NO-REALIGN: vst1.64
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; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16
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; NO-REALIGN: vst1.64
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; NO-REALIGN: vst1.64
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; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #48
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; NO-REALIGN: vst1.64
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; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #32
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; NO-REALIGN: vst1.64
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; NO-REALIGN: add [[R2:r[0-9]+]], [[R1:r[0-9]+]], #16
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; NO-REALIGN: vst1.64
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; NO-REALIGN: vst1.64
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 %retval = alloca <16 x float>, align 16
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 %0 = load <16 x float>* @T3_retval, align 16
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 store <16 x float> %0, <16 x float>* %retval
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 %1 = load <16 x float>* %retval
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 store <16 x float> %1, <16 x float>* %agg.result, align 16
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 ret void
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}
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