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(or (x << c) | (y >> (64 - c))) ==> (shld64 x, y, c) The isel patterns may not catch all the cases if general dag combine has reduced width of source operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92513 91177308-0d34-0410-b5e6-96231b3b80d8