llvm-6502/utils/TableGen
Andrew Trick 2b70dfaaeb Fix a nondeterminism in the ARM assembler.
Adding arbitrary records to ARM.td would break
basic-arm-instructions.s because selection of nop vs mov r0,r0 was
ambiguous (this will be tested by a subsequent addition to ARM.td).
An imperfect but sensible fix is to give precedence to match rules
that have more constraints.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162824 91177308-0d34-0410-b5e6-96231b3b80d8
2012-08-29 03:52:57 +00:00
..
AsmMatcherEmitter.cpp Fix a nondeterminism in the ARM assembler. 2012-08-29 03:52:57 +00:00
AsmWriterEmitter.cpp
AsmWriterInst.cpp
AsmWriterInst.h
CallingConvEmitter.cpp
CMakeLists.txt
CodeEmitterGen.cpp
CodeGenDAGPatterns.cpp Check all patterns for missing instruction flags. 2012-08-28 03:26:49 +00:00
CodeGenDAGPatterns.h Check all patterns for missing instruction flags. 2012-08-28 03:26:49 +00:00
CodeGenInstruction.cpp Heed guessInstructionProperties, and stop warning on redundant flags. 2012-08-24 00:31:16 +00:00
CodeGenInstruction.h Heed guessInstructionProperties, and stop warning on redundant flags. 2012-08-24 00:31:16 +00:00
CodeGenIntrinsics.h
CodeGenRegisters.cpp Print out the location of expanded multiclass defs in TableGen errors. 2012-08-22 23:33:58 +00:00
CodeGenRegisters.h Make synthesized sub-register indexes available in the target namespace. 2012-08-15 18:00:55 +00:00
CodeGenSchedule.cpp
CodeGenSchedule.h
CodeGenTarget.cpp Add CodeGenTarget::guessInstructionProperties. 2012-08-23 19:34:41 +00:00
CodeGenTarget.h Add CodeGenTarget::guessInstructionProperties. 2012-08-23 19:34:41 +00:00
DAGISelEmitter.cpp
DAGISelMatcher.cpp
DAGISelMatcher.h
DAGISelMatcherEmitter.cpp
DAGISelMatcherGen.cpp
DAGISelMatcherOpt.cpp
DFAPacketizerEmitter.cpp
DisassemblerEmitter.cpp
EDEmitter.cpp
FastISelEmitter.cpp
FixedLenDecoderEmitter.cpp Declare some for loop indices inside the for loop statement. 2012-08-17 05:42:16 +00:00
InstrInfoEmitter.cpp Add an MCID::Select flag and TII hooks for optimizing selects. 2012-08-16 23:11:47 +00:00
IntrinsicEmitter.cpp
LLVMBuild.txt
Makefile
PseudoLoweringEmitter.cpp
RegisterInfoEmitter.cpp Make synthesized sub-register indexes available in the target namespace. 2012-08-15 18:00:55 +00:00
SequenceToOffsetTable.h Fix a bunch of -Wdocumentation warnings. 2012-08-23 16:54:08 +00:00
SetTheory.cpp
SetTheory.h
StringToOffsetTable.h Add some missing includes for the build against stdcxx. 2012-08-10 10:53:56 +00:00
SubtargetEmitter.cpp Added MispredictPenalty to SchedMachineModel. 2012-08-08 02:44:16 +00:00
TableGen.cpp
TableGenBackends.h
TGValueTypes.cpp
X86DisassemblerShared.h Add more indirection to the disassembler tables to reduce amount of space used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data. 2012-08-01 07:39:18 +00:00
X86DisassemblerTables.cpp Add more indirection to the disassembler tables to reduce amount of space used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data. 2012-08-01 07:39:18 +00:00
X86DisassemblerTables.h Remove trailing whitespace 2012-07-31 05:28:41 +00:00
X86ModRMFilters.cpp
X86ModRMFilters.h
X86RecognizableInstr.cpp Mark MOVZX32_NOREX as isCodeGenOnly and neverHasSideEffects. The isCodeGenOnly change allows special detection of _NOREX instructions to be removed from tablegen disassembler code. 2012-07-30 06:48:11 +00:00
X86RecognizableInstr.h Fix a bunch of -Wdocumentation warnings. 2012-08-23 16:54:08 +00:00