Richard Osborne 763c858ede [XCore] Add TSETR instruction. ... This instruction is not targeted by the compiler but it is needed for the MC layer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175406 91177308-0d34-0410-b5e6-96231b3b80d8		2013-02-17 22:32:41 +00:00
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AArch64	Add AArch64 CRC32 instructions	2013-02-06 09:13:13 +00:00
ARM	Make ARMAsmParser accept the correct alignment specifier syntax in instructions.	2013-02-14 14:46:12 +00:00
MBlaze	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
Mips	This is a resubmittal. For some reason it broke the bots yesterday	2013-01-17 00:28:20 +00:00
X86	death to extra whitespace	2013-02-14 19:15:14 +00:00
XCore	[XCore] Add TSETR instruction.	2013-02-17 22:32:41 +00:00