Tim Northover 44edc227c7 ARM: Mark double-precision instructions as such ...

This prevents us from silently accepting invalid instructions on (for example)
Cortex-M4 with just single-precision VFP support.

No tests for the extra Pat Requires because they're essentially assertions: the
affected code should have been lowered to libcalls before ISel.

rdar://problem/15302004

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193354 91177308-0d34-0410-b5e6-96231b3b80d8

2013-10-24 15:49:39 +00:00

..

AArch64

[AArch64] Add support for NEON scalar extract narrow instructions.

2013-10-18 14:03:24 +00:00

ARM

ARM: Mark double-precision instructions as such

2013-10-24 15:49:39 +00:00

AsmParser

MCParser/Debug info: Accept line number 0 as a legitimate value, since

2013-09-26 23:37:11 +00:00

COFF

MC asm parser: allow ?'s in symbol names, and handle @'s in names in MS asm

2013-10-18 20:46:28 +00:00

Disassembler

Make ARM hint ranges consistent, and add tests for these ranges

2013-10-23 10:14:40 +00:00

ELF

MC: Support multiple sections with the same name in the same comdat group

2013-10-22 23:41:52 +00:00

MachO

Add test I forgot to git add in r191824.

2013-10-02 14:49:41 +00:00

Markup

…

Mips

Added tests for microMIPS relocations 1.

2013-10-24 10:55:00 +00:00

PowerPC

PPC: Allow partial fills in writeNopData()

2013-09-26 09:18:48 +00:00

SystemZ

[SystemZ] Add comparisons of high words and memory

2013-10-01 15:00:44 +00:00

X86

Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instructions to parse either GR32 or GR64 without resorting to duplicating instructions.

2013-10-14 04:55:01 +00:00