llvm-6502/test/CodeGen
Venkatraman Govindaraju 771023dbcb [Sparc] Use %r_disp32 for pc_rel entries in gcc_except_table and eh_frame.
Otherwise, assembler (gas) fails to assemble them with error message "operation
combines symbols in different segments". This is because MC computes
pc_rel entries with subtract expression between labels from different sections.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200373 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-29 04:51:35 +00:00
..
AArch64 [AArch64 NEON] Lower SELECT_CC with vector operand. 2014-01-29 01:57:30 +00:00
ARM [ARM] Remove superfluous inline asm mode switch test 2014-01-29 00:49:28 +00:00
CPP
Generic Additional fix for 200201: due to dependence on bitwidth test was moved to X86 directory. 2014-01-27 09:43:10 +00:00
Hexagon
Inputs
Mips [DAGCombiner] Teach how to fold sext/aext/zext of constant build vectors. 2014-01-27 18:45:30 +00:00
MSP430 Fix known typos 2014-01-24 17:20:08 +00:00
NVPTX [NVPTX] Fix emitting aggregate parameters 2014-01-28 18:35:29 +00:00
PowerPC Handle spilling the PPC GPRC_NOR0 register class 2014-01-28 05:32:58 +00:00
R600 R600/SI: Add pattern for truncating i32 to i1 2014-01-28 03:01:16 +00:00
SPARC [Sparc] Use %r_disp32 for pc_rel entries in gcc_except_table and eh_frame. 2014-01-29 04:51:35 +00:00
SystemZ XFAIL test/CodeGen/SystemZ/alias-01.ll which requires CodeGen TBAA 2014-01-25 19:31:44 +00:00
Thumb CodeGen: Stop treating vectors as aggregates 2014-01-21 22:46:46 +00:00
Thumb2 [Thumbv8] Fix the value of BLXOperandIndex of isV8EligibleForIT 2014-01-23 19:55:33 +00:00
X86 Use a raw_stream to implement the mangler. 2014-01-29 02:30:38 +00:00
XCore