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https://github.com/c64scene-ar/llvm-6502.git
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b49ee78320
This optimization transforms code like: bb1: %0 = icmp ne i32 %a, 0 %1 = icmp ne i32 %b, 0 %or.cond = or i1 %0, %1 br i1 %or.cond, label %TrueBB, label %FalseBB into a multiple branch instructions like: bb1: %0 = icmp ne i32 %a, 0 br i1 %0, label %TrueBB, label %bb2 bb2: %1 = icmp ne i32 %b, 0 br i1 %1, label %TrueBB, label %FalseBB This optimization is already performed by SelectionDAG, but not by FastISel. FastISel cannot perform this optimization, because it cannot generate new MachineBasicBlocks. Performing this optimization at CodeGenPrepare time makes it available to both - SelectionDAG and FastISel - and the implementation in SelectiuonDAG could be removed. There are currenty a few differences in codegen for X86 and PPC, so this commmit only enables it for FastISel. Reviewed by Jim Grosbach This fixes rdar://problem/19034919. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223786 91177308-0d34-0410-b5e6-96231b3b80d8
43 lines
931 B
LLVM
43 lines
931 B
LLVM
; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort -verify-machineinstrs < %s | FileCheck %s
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; CHECK-label: test_or
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; CHECK: cbnz w0, {{LBB[0-9]+_2}}
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; CHECK: cbz w1, {{LBB[0-9]+_1}}
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define i64 @test_or(i32 %a, i32 %b) {
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bb1:
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%0 = icmp eq i32 %a, 0
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%1 = icmp eq i32 %b, 0
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%or.cond = or i1 %0, %1
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br i1 %or.cond, label %bb3, label %bb4, !prof !0
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bb3:
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ret i64 0
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bb4:
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%2 = call i64 @bar()
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ret i64 %2
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}
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; CHECK-label: test_ans
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; CHECK: cbz w0, {{LBB[0-9]+_2}}
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; CHECK: cbnz w1, {{LBB[0-9]+_3}}
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define i64 @test_and(i32 %a, i32 %b) {
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bb1:
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%0 = icmp ne i32 %a, 0
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%1 = icmp ne i32 %b, 0
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%or.cond = and i1 %0, %1
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br i1 %or.cond, label %bb4, label %bb3, !prof !1
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bb3:
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ret i64 0
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bb4:
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%2 = call i64 @bar()
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ret i64 %2
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}
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declare i64 @bar()
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!0 = metadata !{metadata !"branch_weights", i32 5128, i32 32}
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!1 = metadata !{metadata !"branch_weights", i32 1024, i32 4136}
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