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llvm-6502/lib/Target/R600
History
Craig Topper 787e71df69 Make some arrays 'static const' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186307 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-15 06:39:13 +00:00
..
InstPrinter
R600: Bank Swizzle now display SCL equivalent
2013-06-29 19:32:29 +00:00
MCTargetDesc
Remove address spaces from MC.
2013-07-02 15:49:13 +00:00
TargetInfo
…
AMDGPU.h
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
AMDGPU.td
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
AMDGPUAsmPrinter.cpp
R600/SI: Initial local memory support
2013-07-10 16:37:07 +00:00
AMDGPUAsmPrinter.h
…
AMDGPUCallingConv.td
R600/SI: Add support for f64 kernel arguments
2013-07-12 18:15:26 +00:00
AMDGPUConvertToISA.cpp
…
AMDGPUFrameLowering.cpp
R600: Fix calculation of stack offset in AMDGPUFrameLowering
2013-06-07 20:52:05 +00:00
AMDGPUFrameLowering.h
…
AMDGPUIndirectAddressing.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
AMDGPUInstrInfo.cpp
R600: Use new getNamedOperandIdx function generated by TableGen
2013-06-25 21:22:18 +00:00
AMDGPUInstrInfo.h
R600: Use new getNamedOperandIdx function generated by TableGen
2013-06-25 21:22:18 +00:00
AMDGPUInstrInfo.td
…
AMDGPUInstructions.td
R600: Add local memory support via LDS
2013-06-28 15:47:08 +00:00
AMDGPUIntrinsics.td
R600: Add support for GROUP_BARRIER instruction
2013-06-28 15:46:59 +00:00
AMDGPUISelLowering.cpp
Make some arrays 'static const'
2013-07-15 06:39:13 +00:00
AMDGPUISelLowering.h
R600: Use DAG lowering pass to handle fcos/fsin
2013-07-09 15:03:11 +00:00
AMDGPUMachineFunction.cpp
R600: Add local memory support via LDS
2013-06-28 15:47:08 +00:00
AMDGPUMachineFunction.h
R600: Add local memory support via LDS
2013-06-28 15:47:08 +00:00
AMDGPUMCInstLower.cpp
…
AMDGPUMCInstLower.h
…
AMDGPURegisterInfo.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
AMDGPURegisterInfo.h
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
AMDGPURegisterInfo.td
…
AMDGPUSubtarget.cpp
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
AMDGPUSubtarget.h
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
AMDGPUTargetMachine.cpp
R600: Do not predicated basic block with multiple alu clause
2013-07-09 15:03:33 +00:00
AMDGPUTargetMachine.h
Remove dead prototype.
2013-06-18 06:24:14 +00:00
AMDILBase.td
R600: Move Subtarget feature definitions into AMDGPU.td
2013-06-07 20:28:49 +00:00
AMDILCFGStructurizer.cpp
Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
2013-07-14 04:42:23 +00:00
AMDILInstrInfo.td
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
AMDILIntrinsicInfo.cpp
R600: Rework subtarget info and remove AMDILDevice classes
2013-06-07 20:37:48 +00:00
AMDILIntrinsicInfo.h
…
AMDILIntrinsics.td
…
AMDILISelDAGToDAG.cpp
R600: Add local memory support via LDS
2013-06-28 15:47:08 +00:00
AMDILISelLowering.cpp
Make some arrays 'static const'
2013-07-15 06:39:13 +00:00
AMDILRegisterInfo.td
…
CMakeLists.txt
Move StructurizeCFG out of R600 to generic Transforms.
2013-06-19 20:18:24 +00:00
LLVMBuild.txt
…
Makefile
…
Processors.td
Add a newline.
2013-07-01 21:31:10 +00:00
R600ControlFlowFinalizer.cpp
Make some arrays 'static const'
2013-07-15 06:39:13 +00:00
R600Defines.h
R600: Add local memory support via LDS
2013-06-28 15:47:08 +00:00
R600EmitClauseMarkers.cpp
Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
2013-07-14 04:42:23 +00:00
R600ExpandSpecialInstrs.cpp
R600: Use new getNamedOperandIdx function generated by TableGen
2013-06-25 21:22:18 +00:00
R600InstrFormats.td
R600: Add local memory support via LDS
2013-06-28 15:47:08 +00:00
R600InstrInfo.cpp
Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
2013-07-14 04:42:23 +00:00
R600InstrInfo.h
R600: Support schedule and packetization of trans-only inst
2013-06-29 19:32:43 +00:00
R600Instructions.td
R600: Do not predicated basic block with multiple alu clause
2013-07-09 15:03:33 +00:00
R600Intrinsics.td
…
R600ISelLowering.cpp
R600/SI: Initial local memory support
2013-07-10 16:37:07 +00:00
R600ISelLowering.h
R600: Use DAG lowering pass to handle fcos/fsin
2013-07-09 15:03:11 +00:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
R600: Support schedule and packetization of trans-only inst
2013-06-29 19:32:43 +00:00
R600MachineScheduler.h
R600: Support schedule and packetization of trans-only inst
2013-06-29 19:32:43 +00:00
R600OptimizeVectorRegisters.cpp
R600: Fix wrong export reswizzling
2013-07-09 15:03:19 +00:00
R600Packetizer.cpp
R600: Do not predicated basic block with multiple alu clause
2013-07-09 15:03:33 +00:00
R600RegisterInfo.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
R600RegisterInfo.h
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
R600RegisterInfo.td
R600: Support schedule and packetization of trans-only inst
2013-06-29 19:32:43 +00:00
R600Schedule.td
R600: Add local memory support via LDS
2013-06-28 15:47:08 +00:00
R600TextureIntrinsicsReplacer.cpp
…
SIAnnotateControlFlow.cpp
…
SIDefines.h
R600/SI: Initial local memory support
2013-07-10 16:37:07 +00:00
SIInsertWaits.cpp
R600/SI: Initial support for LDS/GDS instructions
2013-07-10 16:36:43 +00:00
SIInstrFormats.td
R600/SI: Initial support for LDS/GDS instructions
2013-07-10 16:36:43 +00:00
SIInstrInfo.cpp
Make some arrays 'static const'
2013-07-15 06:39:13 +00:00
SIInstrInfo.h
…
SIInstrInfo.td
R600: Remove unsafe type punning. No intended functionality change.
2013-07-12 20:18:05 +00:00
SIInstructions.td
R600/SI: Implement select and compares for SI
2013-07-12 18:15:19 +00:00
SIIntrinsics.td
R600/SI: Add intrinsic for retrieving the current thread ID
2013-07-10 16:36:52 +00:00
SIISelLowering.cpp
R600/SI: Add double precision fsub pattern for SI
2013-07-12 18:15:08 +00:00
SIISelLowering.h
R600/SI: Report unaligned memory accesses as legal for > 32-bit types
2013-06-25 02:39:35 +00:00
SILowerControlFlow.cpp
R600/SI: Initial support for LDS/GDS instructions
2013-07-10 16:36:43 +00:00
SIMachineFunctionInfo.cpp
…
SIMachineFunctionInfo.h
…
SIRegisterInfo.cpp
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
SIRegisterInfo.h
Don't cache the instruction and register info from the TargetMachine, because
2013-06-07 20:28:55 +00:00
SIRegisterInfo.td
…
SISchedule.td
…