llvm-6502/test/MC/Disassembler
Tim Northover a9a94ce839 TableGen: fix operand counting for aliases
TableGen has a fairly dubious heuristic to decide whether an alias should be
printed: does the alias have lest operands than the real instruction. This is
bad enough (particularly with no way to override it), but it should at least be
calculated consistently for both strings.

This patch implements that logic: first get the *correct* string for the
variant, in the same way as the Matcher, without guessing; then count the
number of whitespace chars.

There are basically 4 changes this brings about after the previous
commits; all of these appear to be good, so I have changed the tests:

+ ARM64: we print "neg X, Y" instead of "sub X, xzr, Y".
+ ARM64: we skip implicit "uxtx" and "uxtw" modifiers.
+ Sparc: we print "mov A, B" instead of "or %g0, A, B".
+ Sparc: we print "fcmpX A, B" instead of "fcmpX %fcc0, A, B"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208969 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-16 09:42:04 +00:00
..
AArch64 TableGen/ARM64: print aliases even if they have syntax variants. 2014-05-15 11:16:32 +00:00
ARM ARM: implement support for the UDF mnemonic 2014-05-14 03:47:39 +00:00
ARM64 TableGen: fix operand counting for aliases 2014-05-16 09:42:04 +00:00
Mips [mips] Move disassembler test (test_2r_msa64) into correct folder. 2014-05-12 16:59:34 +00:00
PowerPC [PowerPC] Initial support for the VSX instruction set 2014-03-13 07:58:58 +00:00
Sparc TableGen: fix operand counting for aliases 2014-05-16 09:42:04 +00:00
SystemZ [SystemZ] Add support for z196 float<->unsigned conversions 2014-03-21 10:56:30 +00:00
X86 X86Disassembler - fixed a bug in immediate print 2014-04-23 07:21:04 +00:00
XCore