Bruno Cardoso Lopes 79abd1c27c Since ARM's prefetch implementation predicted the presence of a instruction ...

cache prefetch and now that the info from "prefetch" to "ARMPreload" is present,
only add a testcase for PLI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132978 91177308-0d34-0410-b5e6-96231b3b80d8

2011-06-14 05:11:46 +00:00

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Analysis

Test case for r132797.

2011-06-14 03:02:05 +00:00

Archive

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Assembler

Add one more argument to the prefetch intrinsic to indicate whether it's a data

2011-06-14 04:58:37 +00:00

Bindings/Ocaml

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Bitcode

Add missing newlines.

2011-05-28 01:35:58 +00:00

BugPoint

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CodeGen

Since ARM's prefetch implementation predicted the presence of a instruction

2011-06-14 05:11:46 +00:00

DebugInfo

Fix a regression I recently introduced by removing DwarfRegNum of

2011-05-27 22:15:01 +00:00

ExecutionEngine

Reverted r132135 per Xerxes request. These tests are passing for his setup. Requires more research.

2011-05-31 21:50:33 +00:00

Feature

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FrontendAda

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FrontendC

Reverted r132785. It seems this test needs more research.

2011-06-10 05:35:25 +00:00

FrontendC++

Remove testcase. It's problematic for the buildbots.

2011-06-03 20:43:58 +00:00

FrontendFortran

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FrontendObjC

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FrontendObjC++

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Integer

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lib

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Linker

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LLVMC

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MC

Heuristic: If the number of operands in the alias are more than the number of

2011-06-14 03:17:20 +00:00

Object

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Other

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Scripts

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TableGen

Teach TableGen to evaluate DAG expressions as set operations.

2011-06-04 04:11:37 +00:00

Transforms

Avoid fusing bitcasts with dynamic allocas if the amount-to-allocate

2011-06-13 18:48:49 +00:00

Unit

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Verifier

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CMakeLists.txt

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lit.cfg

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lit.site.cfg.in

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Makefile

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Makefile.tests

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site.exp.in

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TestRunner.sh

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