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llvm-6502/lib/Target/SparcV8
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Chris Lattner 7a4d2913ea treat conditional branches the same way as conditional moves (giving them 
an operand that contains the condcode), making things significantly simpler.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25840 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 06:56:30 +00:00
..
.cvsignore
…
DelaySlotFiller.cpp
…
FPMover.cpp
If the target has V9 instructions, this pass is a noop, don't bother
2006-01-30 05:51:14 +00:00
Makefile
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README.txt
First step towards V9 instructions in the V8 backend, two conditional move
2006-01-30 05:35:57 +00:00
SparcV8.h
treat conditional branches the same way as conditional moves (giving them
2006-01-31 06:56:30 +00:00
SparcV8.td
Subtarget feature can now set any variable to any value
2006-01-27 08:09:42 +00:00
SparcV8AsmPrinter.cpp
compactify all of the integer conditional moves into one instruction that takes
2006-01-31 06:49:09 +00:00
SparcV8InstrFormats.td
…
SparcV8InstrInfo.cpp
…
SparcV8InstrInfo.h
…
SparcV8InstrInfo.td
treat conditional branches the same way as conditional moves (giving them
2006-01-31 06:56:30 +00:00
SparcV8ISelDAGToDAG.cpp
treat conditional branches the same way as conditional moves (giving them
2006-01-31 06:56:30 +00:00
SparcV8RegisterInfo.cpp
…
SparcV8RegisterInfo.h
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SparcV8RegisterInfo.td
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SparcV8Subtarget.cpp
Two changes:
2006-01-30 04:57:43 +00:00
SparcV8Subtarget.h
Rest of subtarget support, remove references to ppc
2006-01-26 07:22:22 +00:00
SparcV8TargetMachine.cpp
…
SparcV8TargetMachine.h
…

README.txt 

To-do
-----

* Keep the address of the constant pool in a register instead of forming its
  address all of the time.
* We can fold small constant offsets into the %hi/%lo references to constant
  pool addresses as well.
* When in V9 mode, register allocate %icc[0-3].