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7add5421a6
llvm-6502
/
test
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CodeGen
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NVPTX
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Justin Holewinski
7add5421a6
[NVPTX] Fix off-by-one error when creating the VT list for an SDNode
...
git-svn-id:
https://llvm.org/svn/llvm-project/llvm/trunk@196503
91177308-0d34-0410-b5e6-96231b3b80d8
2013-12-05 12:58:00 +00:00
..
add-128bit.ll
annotations.ll
arithmetic-fp-sm20.ll
arithmetic-int.ll
bug17709.ll
[NVPTX] Properly handle bitcast ConstantExpr when checking for the alignment of function parameters
2013-11-11 19:28:19 +00:00
callchain.ll
[NVPTX] Fix handling of indirect calls
2013-11-15 12:30:04 +00:00
calling-conv.ll
compare-int.ll
constant-vectors.ll
[NVPTX] Make constant vector test case endian-independent
2013-09-19 13:14:44 +00:00
convert-fp.ll
convert-int-sm20.ll
ctlz.ll
ctpop.ll
cttz.ll
fast-math.ll
fma-disable.ll
fma.ll
fp-literals.ll
[NVPTX] Start conversion to MC infrastructure
2013-08-06 14:13:27 +00:00
generic-to-nvvm.ll
global-ordering.ll
i1-global.ll
i1-int-to-fp.ll
[NVPTX] Add missing patterns for i1 [s,u]int_to_fp
2013-08-06 14:13:34 +00:00
i1-param.ll
i8-param.ll
implicit-def.ll
Make AsmPrinter::emitImplicitDef a virtual method so targets can emit custom comments for implicit defs
2013-10-11 12:39:36 +00:00
inline-asm.ll
[NVPTX] Re-enable assembly printing support for inline assembly
2013-08-24 01:17:23 +00:00
intrin-nocapture.ll
intrinsic-old.ll
intrinsics.ll
ld-addrspace.ll
ld-generic.ll
ldparam-v4.ll
[NVPTX] Fix off-by-one error when creating the VT list for an SDNode
2013-12-05 12:58:00 +00:00
ldu-i8.ll
ldu-reg-plus-offset.ll
lit.local.cfg
[tests] Cleanup initialization of test suffixes.
2013-08-16 00:37:11 +00:00
load-sext-i1.ll
local-stack-frame.ll
[NVPTX] Fix bug in stack code generation causes by MC conversion
2013-08-06 14:13:31 +00:00
module-inline-asm.ll
nvvm-reflect.ll
param-align.ll
pr13291-i1-store.ll
pr16278.ll
pr17529.ll
[NVPTX] Switch from StrongPHIElimination to PHIElimination in NVPTXTargetMachine, and add some missing optimization passes to addOptimizedRegAlloc
2013-10-11 12:39:39 +00:00
ptx-version-30.ll
ptx-version-31.ll
refl1.ll
rsqrt.ll
sched1.ll
sched2.ll
sext-in-reg.ll
sext-params.ll
simple-call.ll
sm-version-20.ll
sm-version-21.ll
sm-version-30.ll
sm-version-35.ll
st-addrspace.ll
st-generic.ll
tuple-literal.ll
vec8.ll
[NVPTX] Fix logic error in loading vector parameters of more than 4 components
2013-11-11 19:28:16 +00:00
vec-param-load.ll
vector-args.ll
vector-compare.ll
vector-loads.ll
vector-select.ll
vector-stores.ll
Add a target legalize hook for SplitVectorOperand (again)
2013-07-26 13:28:29 +00:00