Jakob Stoklund Olesen 7afcc6aa27 Slightly change TableGen's definition of a register subclass.
A subclass is allowed to have a larger spill size than the superclass, and the
spill alignment must be a multiple of the superclass alignment. This causes
the following new subclass relations:

=== Alpha ===
F4RC -> F8RC

=== PPC ===
F4RC -> F8RC

=== SPU ===
R8C -> R16C -> R32C/R32FP -> R64C/R64FP -> GPRC/VECREG

=== X86 ===
FR32  -> FR64  -> VR128
RFP32 -> RFP64 -> RFP80

These subclass relations are consistent with the behaviour of -join-cross-class-copies.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70511 91177308-0d34-0410-b5e6-96231b3b80d8
2009-04-30 21:22:44 +00:00
..
2009-02-18 16:37:45 +00:00
2009-02-26 19:02:23 +00:00
2009-03-13 16:09:24 +00:00