Juergen Ributzka 1154be8198 [FastISel][X86] Fix smul.with.overflow.i8 lowering. ...

Add custom lowering code for signed multiply instruction selection, because the
default FastISel instruction selection for ISD::MUL will use unsigned multiply
for the i8 type and signed multiply for all other types. This would set the
incorrect flags for the overflow check.

This fixes <rdar://problem/17549300>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212493 91177308-0d34-0410-b5e6-96231b3b80d8

2014-07-07 21:52:21 +00:00

..

AArch64

Allow AArch64FastISel to degrade graceully in the presence of an MVT::i128

2014-07-07 21:37:51 +00:00

ARM

ARM: properly lower dllimport'ed global values

2014-07-07 05:18:35 +00:00

CPP

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Generic

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Hexagon

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Inputs

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Mips

[mips] Add tests for the 'ret', 'call', and 'indirectbr' LLVM IR instruction.

2014-07-04 15:16:14 +00:00

MSP430

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NVPTX

[NVPTX] Add reflect intrinsic (better than matching by function name)

2014-06-27 18:36:11 +00:00

PowerPC

[PowerPC] Fix testcase regression

2014-07-07 19:41:54 +00:00

R600

R600: Fix mishandling of load / store chains.

2014-07-07 18:34:45 +00:00

SPARC

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

SystemZ

IR: add "cmpxchg weak" variant to support permitted failure.

2014-06-13 14:24:07 +00:00

Thumb

ARM: Fix fastcc calling convention for Thumb1

2014-06-13 08:33:03 +00:00

Thumb2

ARM: Fix TPsoft for Thumb mode

2014-06-24 15:45:59 +00:00

X86

[FastISel][X86] Fix smul.with.overflow.i8 lowering.

2014-07-07 21:52:21 +00:00

XCore

llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.

2014-07-04 11:58:03 +00:00